(Paper 29.5, a 7Nm CMOS Technology Platform for Mobile and High-Performance Compute

(a) (b) (c) (d)

Globalfoundries researchers will present a fully integrated 7nm CMOS platform that provides significant density scaling and performance improvements over 14nm. It features a 3rd-generation FinFET architecture with self-aligned quadruple patterning (SAQP) used for fin formation, and self-aligned double patterning for metallization. The 7nm platform features an improvement of 2.8x in routed logic density, along with impressive performance/power responses versus 14nm: a >40% performance increase at a fixed power, or alternatively a power reduction of >55% at a fixed frequency. The researchers demonstrated the platform by using it to build an incredibly small 0.0269µm2 SRAM cell. Multiple Cu/low-k BEOL stacks are possible for a range of system-on-chip (SoC) applications, and a unique multi-workfunction process makes possible a range of threshold voltages for diverse applications. A complete set of foundation and complex IP (intellectual property) is available in this advanced CMOS platform for both high-performance computing and mobile applications.

Graph (a) above shows the improved power and performance responses of the new platform compared to the previous 14nm node; (b) shows that the 7nm SRAM cell demonstrated ~2x speed enhancement and >2x density scaling improvement vs. 14nm; (c) shows an example of two BEOL stacks, with the cross-section focused on the 1X and 2X levels; and (d) shows an improved electromigration lifetime compared to the prior node.

(Paper 29.5, “A 7nm CMOS Technology Platform for Mobile and High-Performance Compute Applications,” S. Narasimha et al, Globalfoundries)