Serial EEPROM

AT35000 Process and AT24C08A Product Qualification Package

The attached data summarizes the results of the AT35500 Process Reliability and Qualification Testing.

This report includes data from devices that have been manufactured on the AT35500 Process. The specific devices included in the associated PCN are covered by virtue of their similarity to the qualification test vehicles utilized below. All Serial EEPROM devices fabricated on this process have been qualified by similarity based on the following justification:

Qualification by similarity is a standard practice of all major IC suppliers whose product lines are as extensive and diverse as Atmel Corporation's. The general philosophy and practice of qualification by similarity is that product using the exact same materials and processing will contain the same level of random defects regardless of the final product. Product to product differences such die dimensions, memory density, lead count, or die/package aspect ratio are addressed by selecting the most complex die or 'worst case' package (with respect to these attributes) from the Fabrication Technology or Package Family.

By qualifying the most complex die or 'worst case' package Atmel can perform more frequent periodic qualifications or Reliability Monitors. This increased frequency is the best assurance of continued high quality and reliability in Atmel's product.

All devices in this report are manufactured to the same design rules, minimum geometry’s, and utilize Atmel’s standard EEPROM memory cell. Because all these devices are fabricated on the same process, they have the same number of layers, metal, passivation, and implant levels. The devices vary only in memory density and the amount of associated support logic.

This report provides the following information:

- Process Description

- Structure Level (Package and WLR) Reliability Summary

- Process Reliability Summary

- Early Life Failure Summary

- Process Qualification Summary

- Write Endurance , ESD and Latch Up Summary

Thank you for your interest in Atmel’s Product Line. Please contact us if you have additional questions or comments.

AT35500 Wafer Process Technology

Process Type (Name): 0.35 um CMOS Double Poly EEPROM

Base Material:Silicon Substrate 14um EPI

Final Wafer Thickness (pkg dependent)279um or 508um

Wafer Diameter150mm

Number Of Masks:32 (2LM) 35 (3LM)

Gate Oxide:

MaterialSilicon Dioxide

Thickness110A LV Gate Ox

275A HV Gate Ox

Amorphous Silicon:

Number of Layers2

Thickness Poly 11,400A

Thickness Poly 23,050A

Metal:

Number of Layers2 or 3depending upon device

Material:Al 0.5%Cu + TiN ARC

Layer 1 Thickness5,000A + 1000A ARC

Layer 2 Thickness8,000A + 250A ARC for 2LM

5,000A + 1000A ARC for 3LM

Top metal Thickness8,000A + 250A ARC

Passivation:

MaterialHDP Oxide/Oxynitride

Thickness11,000A/10,000A

In Production:2 Years

Location: Fab 5 – Colorado Springs, Colorado

AT35500 Process Reliability

Wafer Level

Hot Carrier

Purpose

Hot carrier-induced degradation of MOSFET parameters over time is an important reliability concern. High energy carriers are generated in the MOSFET by the large channel electric fields near the drain region. Interface traps and oxide charge affect transistor performance.

Test Description

The test is performed by forcing a high drain bias on the device (Vds>Vddmax) to accelerate the carriers to their maximum. The same time the gate bias (Vgs) is chosen in order to maximize the substrate current. Devices with minimum Leff are tested. The lifetime is deduced for each device under test conditions and extrapolated to worst operation conditions.

Conditions

/

Standard

Parallel DC Stress @ 25C
Vdd<Vds<90% Snapback Voltage
3 different Vds, worst case Vgs
1 lot, minimum 15 samples / Life time Tau defined with the failure criteria Idsat shift = 10%
The extrapolated life time in the worst case condition
(@Vds=Vddmax and Vgs set to maximize substrate current)
Degradation for N channel >/= 0.2 years

Sample

/

Results

LV NMOS 25/0.49um
15 devices tested / Lifetime Tau at Vddmax (5.5V) Idsat 10% change = 3,000 years

AT35500 Process Reliability

Wafer Level

Oxide Integrity (TDDB)

Purpose

a) To determine the activation energy of gate oxide failures on poly plate capacitors.

b) To determine the field acceleration factor for intrinsic gate oxide failures.

c) To determine the sigma the lognormal standard deviation of the time to breakdown distribution of the intrinsic gate oxide.

Test Description

The average gate oxide thickness of 110.5A as measured by C-V. The N-channel poly plate capacitors with an area of 20,113um2 were stressed at 175, 200 and 225C at 9.5, 10.0 and 10.5MV/cm. The gate poly was biased negatively with respect to the substrate.

Conditions

/

Standard

Constant Voltage at 85%, 90% and 95% of hard breakdown voltage
3 different temperatures175C, 200C, 225C
Field 9.5, 10 and 10.5 MV/cm
3 wafers per lot
5 sites per temp/field condition / Using the E Model and extrapolating the Gate oxide use conditions at up to 5.0V+10% at maximum use temperature 105C.
Requirement 10 years

Sample

/

Results

45 devices tested / Estimated Time to reach 0.01% failures @ Vddmax (5.5V) and 105C = 922 years

AT35500 Process Reliability

Package Level

Electromigration

Purpose

The test is performed to check the metallization quality

Test Description

The test is performed by forcing a high current through the test structure at 200C temperature and record the resistance change.

Conditions

/

Standard

Parallel DC stress (QualiTau Mira @ 200C
Current Density 5MA/cm2
1 lot 15 units per structure / Time to 0.1% failure @ worst case use conditions
>10 years operation @ failure criteria and use conditions
Failure criterion delta R/R=10%
Device
/ Temperature /
Dimensions
Width/Thickness /
Design Rules
W=Metal width /
Design Rules
(mA) /
Extrapolated data from EM test(mA)
Contact / 70C
85C
125C / 0.35 / 0.90
0.60
0.19
Metal 1 / 70C
85C
125C / 0.42/0.5000 / 3.0*(W-0.08)
1.88*(W-0.08)
0.64*(W-0.08) / 1.02
0.98
0.33 / 3.78
2.37
0.81
Via 1 / 70C
85C
125C / 0.42 / 1.20
0.75
0.25 / 1.60
1.04
0.39
Metal 2 / 70C
85C
125C / 0.56/0.5000 / 3.0*(W-0.08)
1.88*(W-0.08)
0.64*(W-0.08) / 1.44
0.90
0.31
Via 2 / 70C
85C
125C / 0.42 / 1.20
0.75
0.25
Top Metal / 70C
85C
125C / 0.56/0.8000 / 4.0*(W-0.08)
2.5*(W-0.08)
0.85*(W-0.08) / 1.92
1.20
0.41 / 10.89
6.82
2.33

AT35500 Process Reliability

Dynamic Operating Life Test - Continuous Read
PART TYPE / LOT NUMBER / DATE CODE / SAMPLE SIZE / TOTAL CKT HRS (K) / AMBIENT TEMP (C) / Vcc (V) / FAILURES / SEE NOTE#
AT17C256 / 0g0024 / 0024 / 100 / 101 / 150 / 5.5 / 0
AT24C1024 / 0g4227 / 0045 / 100 / 101 / 150 / 5.5 / 0
AT93C46 / 0g4228 / 0046 / 100 / 101 / 150 / 5.5 / 0
AT29C040A / 0e1172 / 0015 / 97 / 97 / 125 / 5.5 / 0
AT29C040A / 0e3992 / 0024 / 39 / 78 / 125 / 5.5 / 0
AT29C040A / 0e3998 / 0031 / 99 / 99 / 125 / 5.5 / 0
AT24C256 / 0j3413 / 0112 / 99 / 203 / 150 / 5.5 / 0
AT24C256 / 1e1651 / 0118 / 100 / 101 / 150 / 5.5 / 0
AT24C256 / 1j1241 / 0122 / 92 / 195 / 150 / 5.5 / 0
AT24C256 / 1e4238 / 0126 / 100 / 56 / 150 / 5.5 / 0
AT24C256 / 1l0033 / 0135 / 99 / 203 / 150 / 5.5 / 0
AT24C256 / 1l0037 / 0135 / 100 / 204 / 150 / 5.5 / 0
AT24C256 / 1l0047 / 0135 / 100 / 204 / 150 / 5.5 / 0
AT24C1024 / 1g0983 / 0140 / 105 / 58 / 150 / 5.5 / 0
AT17LV1024 / 1g0747 / 0147 / 100 / 24 / 150 / 5.5 / 0
AT17LV1024 / 1g0757 / 0150 / 99 / 200 / 150 / 5.5 / 0
AT17LV1024 / 1g0570 / 0204 / 100 / 21 / 150 / 5.5 / 0
AT24C256 / 1e1650 / 0204 / 100 / 103 / 150 / 5.5 / 0
AT24C256 / 1j1438 / 0209 / 100 / 106 / 150 / 5.5 / 0
AT24C01A / 1j2987 / 0219 / 100 / 107 / 150 / 5.5 / 0
AT24C256 / 1j2986 / 0216 / 100 / 107 / 150 / 5.5 / 0
AT24C256 / 1n0024 / 0223 / 100 / 60 / 150 / 5.5 / 0
AT24C08A / 2e4640 / 0223 / 100 / 17 / 150 / 5.5 / 0
AT24C512 / 2e6107 / 0224 / 100 / 17 / 150 / 5.5 / 0
AT24C512 / 2e6107 / 0227 / 100 / 17 / 150 / 5.5 / 0
60% Confidence Estimate @ 55C & .6eV = .00107 FITs/1kBits
90% Confidence Estimate @ 55C & .6eV = .0270 FITs/1kBits

AT35500 Process Reliability

Data Retention Bake
PART TYPE / LOT NUMBER / DATE CODE / SAMPLE SIZE / TOTAL CKT HRS (K) / AMBIENT TEMP (C) / FAILURES / SEE NOTE#
AT17C256 / 0g0024 / 0024 / 100 / 206 / 250 / 0
AT24C1024 / 0g4227 / 0045 / 100 / 103 / 250 / 0
AT93C46 / 0g4228 / 0046 / 100 / 212 / 250 / 0
AT29C040A / 0e1172 / 0015 / 97 / 97 / 150 / 0
AT29C040A / 0e3992 / 0024 / 39 / 78 / 150 / 0
AT29C040A / 0e3998 / 0031 / 89 / 89 / 150 / 0
AT24C256 / 0j3413 / 0112 / 100 / 202 / 250 / 0
AT24C256 / 1e1651 / 0118 / 100 / 204 / 250 / 0
AT24C256 / 1j1241 / 0122 / 100 / 102 / 150 / 0
AT24C256 / 1e4238 / 0126 / 100 / 109 / 150 / 0
AT24C256 / 1l0033 / 0135 / 99 / 206 / 250 / 0
AT24C256 / 1l0037 / 0135 / 63 / 130 / 250 / 0
AT24C256 / 1l0047 / 0135 / 98 / 202 / 250 / 0
AT24C1024 / 1g0983 / 0140 / 200 / 142 / 250 / 0
AT17LV1024 / 1g0747 / 0147 / 100 / 108 / 250 / 0
AT17LV1024 / 1g0757 / 0150 / 100 / 12 / 250 / 0
AT17LV1024 / 1g0570 / 0204 / 100 / 107 / 250 / 0
AT24C256 / 1e1650 / 0204 / 100 / 202 / 250 / 0
AT24C256 / 1j1438 / 0209 / 100 / 206 / 250 / 0
AT24C1024 / 1h0993 / 0210 / 100 / 202 / 250 / 0
AT24C1024 / 1h2951 / 0210 / 100 / 202 / 250 / 0
AT24C1024 / 1h1326 / 0210 / 100 / 202 / 250 / 0
AT24C01A / 1j2987 / 0219 / 100 / 57 / 250 / 0
AT24C256 / 1n0024 / 0223 / 200 / 214 / 250 / 0
AT24C08A / 2e4640 / 0223 / 100 / 10 / 250 / 0
AT24C512 / 2e6107 / 0224 / 100 / 10 / 250 / 0
AT24C512 / 2e6107 / 0227 / 100 / 17 / 250 / 0
60% Confidence Estimate @ 55C & .7eV = .000054 FITs/1kBits
90% Confidence Estimate @ 55C & .7eV = .000135 FITs/1kBits

AT35500 Process Reliability

Early Life Failure Summary
Programming Conditions: Checkerboard @ 5.0 Volts
Stress Test Conditions: Dynamic Read @ 5.0 Volts
Duration: 48 Hours
Part Number / Lot
Number / Package
Type / Stress Test
Temp (C) / Electrical Test
Temp (C) / Sample
Size / Quantity
Fail
17C256 / 0e5324 / CDIP / 150 / 25 / 99 / 0
17C256 / 0e5341 / CDIP / 150 / 25 / 99 / 0
17C256 / 0g0024 / CDIP / 150 / 25 / 100 / 0
24C1024 / 0g4227 / CDIP / 150 / 25 / 100 / 0
93C46 / 0g4228 / CDIP / 150 / 25 / 100 / 0
29C040A / 0e1172 / PDIP / 125 / 25 / 97 / 0
29C040A / 0e3992 / PDIP / 125 / 25 / 39 / 0
29C040A / 0e3998 / PDIP / 125 / 25 / 99 / 0
24C256 / mj1241 / dBGA / 150 / 25 / 100 / 0
24C256 / 1e1651 / CDIP / 150 / 25 / 100 / 0
24C256 / 1i0033 / CDIP / 150 / 25 / 100 / 0
24C256 / 1i0037 / CDIP / 150 / 25 / 100 / 0
24C256 / 1i0047 / CDIP / 150 / 25 / 100 / 0
24C1024 / 1g0983 / CDIP / 150 / 25 / 100 / 0
24C256 / 1e1650 / CDIP / 150 / 25 / 100 / 0
17C1024 / 1g0570 / CDIP / 150 / 25 / 100 / 0
17C1024 / 1g0747 / CDIP / 150 / 25 / 100 / 0
17C1024 / 1g0757 / CDIP / 150 / 25 / 100 / 0
24C256 / 1j1438 / CDIP / 150 / 25 / 100 / 0
24C02 / 1j2987 / CDIP / 150 / 25 / 100 / 0
34C02 / 1j2986 / CDIP / 150 / 25 / 100 / 0
24C256 / 1n0024 / CDIP / 150 / 25 / 100 / 0
AT24C08A / 2e4640 / CDIP / 150 / 25 / 100 / 0
AT24C512 / 2e6107 / CDIP / 150 / 25 / 100 / 0
AT24C512 / 2e6107 / CDIP / 150 / 25 / 100 / 0
Totals / 2433 / 0

AT35500 Process Qualification

Test Summary

Dynamic Operating Lifetest

- Per JEDEC Standard 22, Method A108A
- 1008 Hours @ 150C, Vcc = 5.5V, Continuous Read
- Checkerboard Pattern Programmed @ 5.0V
- Read Point Tests @ 25C, Final Production Test Program
Duration/
Readpoints / PreCond
JES A113 / Device / Lot # / Sample Size / Quantity
Pass/Fail
1008 Hours w/ Read Points @
168 & 504 / NO / AT24C256
AT24C256
AT24C08A
AT24C512
AT24C512
AT93C46 / 1j2986
1n0024
2e4640
2e6107
2e6107
1j3337 / 100
per Lot / 100/0
100/0
100/0
100/0
100/0
100/0

Data Retention Bake

- 1008 Hours @ 250C, Unbiased
- Checkerboard Pattern Programmed @ 5.0V
- Read Point Tests @ 25C, Final Production Test Program
Duration/
Readpoints / PreCond
JES A113 / Device / Lot # / Sample Size / Quantity
Pass/Fail
1008 Hours w/ Read Points @
168 & 504 / NO / AT24C256
AT24C256
AT24C08A
AT24C512
AT24C512
AT93C46 / 1j2986
1n0024
2e4640
2e6107
2e6107
1j3337 / 100
per Lot / 100/0
100/0
100/0
100/0
100/0
100/0

AT35500 Process Qualification

Test Summary

Autoclave

- 96 Hours @ 100% RH, 121C, Unbiased
Duration/
Readpoints / PreCond
JES A113 / Device / Lot # / Sample Size / Quantity
Pass/Fail
96 Hours / Yes
MSL 1 / AT24C256 / 1e3258 / 100
per Lot / 100/0

Temperature Cycle

- 500 Cycles -65C to 150C, Unbiased
Duration/
Readpoints / PreCond
JES A113 / Device / Lot # / Sample Size / Quantity
Pass/Fail
96 Hours / Yes
MSL 1 / AT24C64 / 2i0005 / 100
per Lot / 100/0

Biased Temperature Humidity

- 1008 Hours @ 85% RH, 85C, Static Bias
Duration/
Readpoints / PreCond
JES A113 / Device / Lot # / Sample Size / Quantity
Pass/Fail
96 Hours / Yes
MSL 1 / AT24C256 / 1e3258 / 100
per Lot / 100/0

AT24C08A Product Qualification

ESD Characterization

Device: AT24C08A
Lot Number: 2g3835, 2g7972, 2g3836
Quantity Tested: 3/ lot per Voltage
ESD Stress Equipment: ORYX Model 11000 ESD Test System
Pass/Fail via Final Production Test Program: EPRO Model 142AX Tester
Test per Mil Std 883, Method 3015: 3 Pulses Each Polarity per Specified Pin Combinations
3 Positive & 3 Negative Pulses per The Specified Pin Combinations
Max Passing Voltage
Pin Name / Function / Tested As / Qty/Fail 500V / Qty/Fail 1000V / Qty/Fail 2000V / Qty/Fail 4000V / Qty/Fail / Voltage
Vcc / Power / Vcc / 9/0 / 9/0 / 9/0 / 6/0 / 9/0 / 2500
Gnd / Ground / Gnd / 9/0 / 9/0 / 9/0 / 6/0 / 9/0 / 2500
A0 / Address / Input / 9/0 / 9/0 / 9/0 / 6/0 / 9/0 / 2500
A1 / Address / Input / 9/0 / 9/0 / 9/0 / 6/0 / 9/0 / 2500
A2 / Address / Input / 9/0 / 9/0 / 9/0 / 6/0 / 9/0 / 2500
WP / Write Protect / Input / 9/0 / 9/0 / 9/0 / 6/0 / 9/0 / 2500
SCL / Serial Clock Input / Input / 9/0 / 9/0 / 9/0 / 6/0 / 9/0 / 2500
SDA / Serial Data / Input/Output / 9/0 / 9/0 / 9/0 / 6/0 / 9/0 / 2500
Functional Test Only Failing Pin Not Identified / See Above / 3/0 / 9/0 / 9/0 / 6/0 / 9/0 / 2500

AT24C08A Product Qualification

Latch-Up Characterization

Device: AT24C08A
Lot Number: 2g3835, 2g7972, 2g3836
Quantity Tested: 5 per lot
Test Method: JEDEC 78
Test Temperature: 25C
Over Current Test Voltage Vcc = 5.0V
Maximum Applied Trigger Current = 150 mA
Maximum Applied Trigger Voltage = 7.0 V
Max Trigger Current / Max Trigger Voltage
Pin Name / Function / Tested As / Passing* -I (mA) / Passing* +I (mA) / Compliance Setting (V) / Passing* -V (V) / Passing* +V (V) / Compliance Setting (mA)
Vcc / Power / Vcc / --- / --- / --- / --- / 7.0 / 250
Gnd / Ground / Gnd / --- / --- / --- / --- / --- / ---
A0 / Address / Input / 200 / 200 / 7.0 / --- / --- / ---
A1 / Address / Input / 200 / 200 / 7.0 / --- / --- / ---
A2 / Address / Input / 200 / 200 / 7.0 / --- / --- / ---
WP / Write Protect / Input / 200 / 200 / 7.0 / --- / --- / ---
SCL / Serial Clock Input / Input / 200 / 200 / 7.0 / --- / --- / ---
SDA / Serial Data / Input / 200 / 200 / 7.0 / --- / --- / ---
SDA / Serial Data / Output / 200 / 200 / 7.0 / --- / --- / ---

* 0 Fails for Latchup or Post Stress Functional Tests.

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