Processing of multi-COMPONENT exponential stimulus in ADC testing
Novy nazov
Processing of dual slope exponential stimulus in ADC testing
alternativa – co je lepsie???
Processing of bi-directional exponential stimulus in ADC testing
Ján Šaliga, Linus Michaeli, , Michal Sakmár, Ján Buša
Technical University of Košice, Faculty of Electrical Engineering and Informatics,
Letná 9, 04120 Košice, Slovak Republic,
{jan.saliga, linus.michaeli, michal.sakmar, jan.busa}@tuke.sk
Abstract – The paper presents a new approach to ADC DNL and INL testing by exponential signal. ADC histogram test methods with exponential stimulus are seems to be one of alternative ADC test methods alternative to sine wave testing. Exponential stimulus test methods published until now were based on simple, single single-component exponential pulses. This that couldcan sometimes partially mask nonlinearity of ADC transfer characteristics. Moreover, estimation of pulse parameters in time domain requires memorizing and processing long records. The new approach is based on the exponential ADC stimulus with two or more different exponential components, e. g., rising and falling slopes of exponential pulses that can be generated very simply and with low costs. Moreover, the different way of signal processing using histograms instead of time record is introduced. Unknown parameters needed for estimation of INL and DNL are calculated by LMS fitting using simplified Newton method (Are you sure about LMS? LMS is reserved for one method of adaptivitation. I guess this is LS minimization using Newton, and this is not LMS). The new test method was verified by simulations and experiment.
Keywords: ADC, DNL and INL histogram test, model of exponential signal, estimation of parameters of exponential signal, Newton method.
Introduction
The deviation of real ADC transfer characteristic from the ideal one is described by differential and integral nonlinearity (DNL, INL). These parameters can be tested by standardized methods [12], [13], which are generally categorized into two groups – static and histogram methods. The static method requires high accuracy DC calibrator and voltmeter. The test procedure consumes a lot of time. The standardized histogram method based on sinewavesine wave histogram analysis is faster and for this reason it is more frequently applied. The bottleneck of the standardized method is requirement on extreme sinewavesine wave purity especially for ADC with high resolution. Generation of such sinewavesine wave requires expensive instrumentation and therefore it is not convenient for low cost applications, e.g., ADC self test in embedded systems.
This fact has been a challenge for many researchers to suggest various improvements and alternative ADC test methods ([1] – [6]). One of those alternative non standardized methods is the method based on simple exponential stimulus ([7] – [9]) that which can be generated very simply by discharging of capacitor across a resistance on ADC input. The advantages of such an exponential signal are:
- Simple generation of high quality stimulus, close to the ideal one.
- Simple and cheap generator circuitry in comparison with harmonic signal generator.
- Easy implementation convenient for the implementation in ADC chip or for embedded systems.
According to [7] the acquired digital samples on the output of ADC under test are memorized and processed by the least mean squares (LMS) fitting in time domain. The fit allows estimation of input exponential waveform parameters. Following, DNL[k] and INL[k] are calculated from the comparison of real measured code histogram and cumulative histogram with the ideal ones calculated from the estimated parameters of stimulus.
The exponential stimulus ADC histogram test method ([7]) seems to be very promising not only because of the simplicity of stimulus generating circuitry ([10]) but also because of its good noise robustness ([11]). The main disadvantage of the based method in [7] is a thread threat of masking some nonlinearities in ADC transfer characteristics as it can be demonstrated by a simple simulation. (Fig. 1 – Fig. 3). Fig. 1 shows the modelled INL of a simulated ADC. Fig. 2 shows the INL achieved by simulated test of the ADC according to ([7]) using simple monotonic exponential test signal. The difference between the modelled INL and the measured one (error of testing) is shown in Fig. 3.
Fig. 1. Modelled INL of simulated ADC
Fig. 2. INL acquired from simulated test by simple monotonic exponential signal
Fig. 3. Difference between the modelled INL and measured INL
The measured INL differs from the origin modelled INL -– here the maximal error is about 0.5 LSB. Source The source of the error is in the LMS fitting of distorted data (its cause is inherently the LS cost function. . In general LMS fitting does not calculate the original input exponential stimulus, but yields a stimulus that has the smallest LMS fit error for nonlinearly distorted samples taken from ADC output. The core problem is that the method cannot distinguish between changed time constant and erroneous INL if the effect of the INL is similar for the given signal. This could also be eliminated by a few measurements with changed amplitude: e.g. fitting full, 50% low, 50% middle, 50% high. Or: LS fit to parts of the excitation. If fit to the lower and higher part of the excitation is different from that of the full fit, this phenomenon appears.
The other bottleneck of the method [7] is the need to process long records of samples by the LMS fitting algorithm that requires a deep memory and a calculation power.
Models of dual slope exponential signal
The disadvantages of basic method in [7] led the authors to a new approach presented in this paper. This new approach is based on the using use of exponential signals in the form of pulses with at least two different components (slopes) that differs at least in one parameter of their mathematical representation. The most simple and common practical example of such a pulse with rising and falling component is shown in Fig. 4.
Fig. 4. Principle of exponential stimulus generation (left) and generated exponential waveform.
The generated exponential waveform must overload ADC input full scale [F1, F2] (Fig. 4). The INL and DNL of ADC under test are estimated only from samples acquired by the ADC inside of its full scale, i.e., the samples with the minimal and maximal codes are excluded from data processing. This condition ensures that all switching effects in the control square signals as well as in the generated exponential waveform are always out of ADC input range and hence they do not impair results of measurement.
In general the test signal may be in the form of a single impulse, periodical or non-periodical train of pulses. In case of train of pulses the generating circuit has to produce all pulses with the same form in each run (final voltages given by voltage levels of control square waveform). Any time jitter of control square waveform does not affect the test because a time shift of starting point of exponential slope does not affect shape of the slope. The record must cover an integer number of pulses, e.g. the record must be started and finished only when signal is either above or below ADC input range. In the case of periodical or quasi-periodical train of exponential pulses the sampling frequency must be chosen as relatively prime to the pulse rate analogously as in standardized sinewavesine wave test ([12], [13]). For any form – one shot or pulse train, the rising and falling slope of stimulus can be simply recognized, separated and regrouped in parallel with ADC output code train processing. Moreover, the segments of testing signal when the signal is out of the ADC input range (code bins 0 and 2N-1) do not impair ADC nonlinearity testing, because they can be simply recognized and excluded from data processing.
Likewise, as for any other histogram method, the quality of the exponential stimulus must be adequate for testing ADC with a given resolution. As it was studied and proved in [10], the main source of distortion is the capacitor in the pulse shaping circuit that must be carefully chosen. Study [10] also showed that some common types of capacitors used in shaping circuit enable generating exponential stimulus for testing ADC with resolution up to 16 bits. Distortion caused by other components is usually negligible (parasitic properties of common resistors and drift of common nowadays reference sources that may be applied in control square generator). According to [11], noise of reference voltage sources in square generator can be effectively suppressed by a convenient choice of the final voltage values Br and Bf in relation to ADC full range (Fig. 4).
The mathematical model of exponential signal according to Fig. 4 inside of ADC input full scale range is as follows:
, (1)
where voltages F1 and F2 are the minimal and maximal value of ADC input full-scale range, respectively, tf and tr are the time constants of exponential pulse, Bf and Br are the final voltages of exponential signal for t → ¥ for falling and rising part of the exponential pulse respectively and t1, t2, t3, t4 are the time instants when the exponential pulse crosses ADC input range borders (Fig. 4).
Let us suppose that signal in Fig. 4 achieves value x in time tx (x=uin(tx)). Then the distribution function P(x) and density function p(x) of the signal can be simply derived from (1) in general form for any value of parameters t and B fulfilling the condition BrF2 and BfF1:
(2)
Normalization constants Df and Dr, given by parameters of stimulus and ADC under test, ensure that functions Pf(x) and Pr(x) fulfil the mathematical condition for distribution function, i.e. function values of Pf(x) and Pr(x) have to be within interval [0, 1] for input signal x within ADC input full scale range (interval [F1, F2]).
The formulas are formally identical for rising and falling exponential stimulus. The only difference is in the value (position) of parameter B with regard to ADC input range. Therefore the generalized formula without indexes f and r is used in following for modelling any slope of the dual slope exponential stimulus.
The general formula (3) for the normalized cumulative code histograms Hcnid(k, B) and simple code histograms Hnid(k, B) for ideal ADC with resolution N bits and for any slope of exponential stimulus can be simply derived using (2) by substitution x=F1+k.Q where Q is the nominal quantization step of ADC.
(3)
Here H(i,B) is measured code histogram for a chosen segment of exponential signal with parameter B, Hcn(k,B) and Hn(k,B) are normalized measured cumulative and simple code histograms, respectively, and M(B) is total number of hits acquired in code bins k=1, 2, …,2N-2 for chosen segment of exponential signal with parameter B. Histograms building process can be performed immediately during acquiring samples from ADC so that no long record is needed, e.g., for two-component exponential stimulus and N-bits ADC memory for only 2.(2N-2) numbers is needed. Histogram values for the terminal code bins k=0 and k=2N-1 are excluded from model as well as from all measurement because they do not contain any information of ADC nonlinearity. Moreover, an unpredictable number of hits can be registered in these bins due to unknown and unimportant time while the stimulus is being out of ADC input range, e.g., time interval [t2, t3] in Fig. 4. This restriction does not matter in testing and it is equal to correction of ADC gain and offset error by straight line connecting these terminal code transition levels, i.e. INL(0) = INL(2N-1) = 0.
ADC DNL and INL for rising or falling part of exponential stimulus can be calculated from the next expression which is valid generally for all ADC histogram test methods using a convenient signal with known distribution function P(k):
, (4)
where T(k) and Tid(k) are real (measured) and nominal transition code levels, respectively, and q(k) and Q are real (measured) quantization step for code k and nominal quantization steps of ADC, respectively. The models of histograms in (3) do not depend on time constant of exponential stimulus. It means that parameter B is the only unknown parameter needed for analysis of histograms and calculation of DNL and INL using formula (4). Moreover, this parameters can be estimated from measured normalized histogram Hn(k) instead of time record fitting as it was done in [7]. This fact greatly simplifies DNL and INL calculation in comparison with [7], where two unknown parameters B and t of the exponential stimulus were required to determine ADC INL using simple exponential stimulus.
Histogram models for simple exponential stimulus
The basic method how to estimate B from measured histograms is least squares? mean fit. To simplify the fitting, equations (3) can be rewritten into a more simple and general form replacing formally the real transition code levels and the real quantization step Q in voltage by their formal normalized values equivalent to ADC binary codes: F1~0, F2~2N-1 and Q~1. Using this formalization, equations (3) can be rewritten into following form:
(5)
where b represents normalized parameter of exponential pulse - voltage B - the final value of each slope of the multi-component exponential stimulus (Fig. 4). If needed, the real transition code levels can be calculated from known DNL or INL using at least two real transition code levels measured by another method, e.g., by the static test method ([12], [13]).
The model can be furthermore simplified using the idea published in [14]: the probability of code k can be approximated by simple rectangular rule (Fig. 5) for numerical calculation of integral instead of analytical integration of density function as follows:
Fig. 5. Rectangular rule applied on the probability of the k-th transition level.
(6)
where a is a constant ensuring that the normalized cumulative histogram is equal to 1 for code 2N-2. Using this normalization condition the equation (6) may be rewritten into the following form: