LED Control System Revision 4

LED Control System Revision 4

LED Control System Revision 4.0

Engineer: Jonathan Langdon

Description of Major Components:

Visual Basic Program:

Form1.vb – Describes the GUI interface for this version of the LED Control System. In this version the “Control Panel” provides four sliders. When attached the Development Board is attached and programmed with “DAC Control Rev 4,” the four sliders independently set the voltage on each of the 4 channels on a single attached Maxim Quad DAC. The “Flush Register” Button sends two bytes of 0 into the FPGA. This operation has the effect of resetting the FPGA to the beginning of its read sequence as per the coding in “DAC Control Rev 4.” The “Com Test” Button reads in a byte typed into the textbox below it and writes that byte into the shift register (which is called for in the VHDL code). The second text box reports the string “complete” when the “Com Test” Button is utilized.

\FPGAControlFunctions.vb – this module provides stereotyped functions for talking to the FPGA in the manner specified by the “DAC Control Rev 4” VHDL coding. The function “ChangeDACVoltagePrimative” is antiquated. The two main functions of interest are:

WriteAByte(x) This function takes a byte (0 – 255) as input and has the effect of first serializing that byte into a binary array (0 upto 8) and then putting that output into a format which can be understood by the FPGA when it is programmed with the revision 4 VHDL code. This has the effect of turning the first USB controller pin into a clock and the second pin into a bit stream. The other 6 pins are not used.

ChangeDACVoltage(x,y) This function takes as input the DAC channel you wish to change and the value to which you wish to change it to. This is accomplished by calling WriteAByte 4 times. The first two are simply zero which flushes out the 8-bit register and brings the FPGA back to initial state (this is only a precaution and is not necessary). The third call tells the FPGA what channel to we are talking about (notice the “+ 128”, it is required the first bit sent be a 1 in order for the FPGA to synchronize to the output stream. The Fourth call writes the value to which we wish to set the DAC.

D2XX_Unit_NET.vb – This module allows one to access the functions within the USB Controllers windows library file (D2XX.dll). Both D2XX.dll and D2XX_Unit_NET.vb are available on the FTDI website.

VHDL Coding:

The VHDL coding (otherwise known as “DAC Control Revision 4” is available in the project file “DACcontrol4.ise.” The Coding Provides three major processes which are necessary to convert the bytes written via the GUI app into the commands necessary to write out to the DACs.

Processes:

ReadInShiftRegister – This first process reads in the data being written onto the USB A channel by the USB controller. This information is essentially the bytes we sent out of the VB application. The Register converts the bytes from serial to parallel. The process uses the first USB pin as a clock-in and the second for data-in.

PassIn – This process reads the data on the Shift Register after every 8 bits is received. The first 8-bits are stored for use in determining the DAC address and the second byte is stored as the value to be written to the DAC. “Flushing the register,” as mentioned earlier, resets the counter which is keeping track of which byte was first.

WriteOut – The final process writes the Data to the specified DAC channel. The particular sequence and timing is specified by the Maxim DAC.

NOTE: Both PassIn and WriteOut use a external clock. This clock must be at least twice as fast as the USB clock-in. This allows the PassIn process to over-sample the ShiftRegister. In actuality, the USB clock has periods on the order of milliseconds, and so data is passed in and written much, much faster than it is clocked onto the FPGA. This makes it unnecessary to store the bits for more than one DAC channel at a time. The DAC itself serves the primary Data store. Finally, the external clock cannot have shorter 75 nanoseconds as this would not allow enough time to program the DACs in the WriteOut process.