Gate Oxide / High-k Reliability Discussion Group Questionnaire

Technologies

  1. Technology Needs and Limits
  2. Will technologies continue to scale down electrical oxide thickness? Limits?
  3. What are the limitations of gate dielectrics?
  4. Leakage
  5. Reliability
  6. When do you expect high-k gate dielectrics being introduced?

o45 nm node

oIn a later technology node

oNever, high–k is just an academic exercise.

  1. Will technologies continue with poly gate?
  2. When do you expect metal gate being introduced in CMOS technologies?

o45 nm node

oIn a later technology node

oNever, metal gate is just an academic exercise.

SiO2/SiON

II. Which degradation models dominate the SiO2/SiONbreakdown?

oAnode hole injection

oHydrogen Release

oMulti-vibrational hydrogen release

o Carrier energy

oOxide field

III.Do you use lifetime extension for TDDB (oxide below 14Å)?

oYes

oNo

a.Which methodology do you use?

oPower consumption Max

oX breakdown on a same transistors

oX breakdown on the circuits

oShift of transistors characteristics (Vt, Ion, Ioff,…)

oOthers

Metal Gate

IVDo you think that,with metal gate, the oxide breakdown still allows the lifetime extension?

oYes

oNo

VDo you think that the oxide breakdown with metal gate represents a metal gate integration showstopper?

oYes

oNo

VI.Are the degradation models known from Poly/SiO2 applicable to Metal/SiO2?

oYes, which physical models are valid? (check all that apply)

oAnode hole injection

oHydrogen release

oMulti-vibrational hydrogen release

oCarrier energy

oOxide field

VII.What voltage acceleration for TDDB is applicable with metal gate?

oexp(1/V)

oexp (a V)

oVn (power law)

oSome other dependence

VIII.What is the most critical challenge for the reliability assessment of MOS devices with metal gate? (check all that apply)

oMethodology

oDielectric breakdown (Soft versus hard)

oStress Induced Leakage Current (SILC)

oCharge trapping

oNBTI PBTI

oNoise (1/f, …)

oDefect density

oOthers …………………………

High-K dielectrics

IX.Is the reliability methodology of conventional SiO2 / SiON based gate dielectrics applicable to high-k gate dielectrics?

oYes

oNo

What improvements / adjustments are required?

X.Are the degradation models known from SiO2 applicable to high-k gate dielectrics?

oYes, which physical models are valid? (check all that apply)

oAnode hole injection

oHydrogen release

oMulti-vibrational hydrogen release

oCarrier energy

oOxide field

XI.What voltage acceleration for TDDB is applicable with metal gate?

oexp(b/V)

oexp(aV)

oVn (power law)

oSome other dependence

XII.What is the most critical challenge for the reliability assessment of MOS devices with high-k gate dielectrics? (check all that apply)

oMethodology

oDielectric breakdown (Soft versus hard)

oStress Induced Leakage Current (SILC)

oCharge trapping

oNBTI PBTI

oNoise (1/f, …)

oDefect density

oOthers …………………………