ELEC 105Laboratory #13Fall 2009

Digital Logic Circuits

Why is this important? The world is going digital – isn’t that what everyone says? When we buy a new gadget, we want it to be digital, even if we’re not exactly sure what that means. We may suspect that much of it is just advertising hype, and sometimes that’s true.

However, a lot of systems do use digital technology now where it wasn’t practical a few years ago. The progress that has been made in the manufacturing of digital devices has been, and continues to be, truly amazing. More and more functions get implemented on a single “chip,” and those functions get more and more complex. As an example, remember when telephone answering machines had cassette tapes? They would jam or wear out, and you had to wait forever for them to rewind. Now answering machines store the sound of a voice digitally; the machine needs no moving parts, and it responds immediately.

Those devices use analog-to-digital converters to change the sound of a voice into a numerical representation that is stored in memory as an array of binary numbers, and it reverses the process to play the messages back. Controlling the whole process involves a lot of digital logic as well. It might be very complex, but the basic rules are the same as the ones we will see in action today.

Reporting

This lab is a “familiarization exercise” and therefore will be weighted 20 points. To receive full credit, your team must demonstrate properly functioning circuits to the instructor or TA in the indicated steps below.

Background

Digital circuits are analyzed using logic relationships referred to as Boolean algebra. The three basic operations of Boolean algebra are AND, OR and NOT. The circuits used to implement these functions are called gates. Table 1 shows the truth table for AND, OR, NAND, and NOR gates, and Table 2 applies to the NOT gate. In both tables, a “1” corresponds to true and a “0” to false. In a digital circuit, a “1” corresponds to a “high” voltage level (+10 V in this lab exercise) and a “0” to a low voltage (0V usually). This exercise will show that NAND gates can be combined to perform the operations of the other gates (AND, OR, NOR, and NOT).

Table 1. Truth table for the AND, OR, NAND, and NOR operations.

Input A / Input B / A AND B (A·B) / A OR B (A+B) / A NAND B / A NOR B
0 / 0 / 0 / 0 / 1 / 1
0 / 1 / 0 / 1 / 1 / 0
1 / 0 / 0 / 1 / 1 / 0
1 / 1 / 1 / 1 / 0 / 0

Table 2. Truth table for the NOT operation.

Input A / NOT A
0 / 1
1 / 0

Procedure

  1. Shown in Figure 1 is the pin-out diagram for a type 4011 quad NAND gate. This integrated circuit chip is fabricated in a standard 14-pin “DIP” (dual inline package) form. Twelve pins provide access to the inputs and outputs of the gates, and two pins are set aside for power connections. The logic gates are designed using CMOS (complementary metal-oxide semiconductor) technology, which makes use of n-channel and p-channel MOSFETs working in tandem to provide the basic logic functions. No resistors are used inside these chips, so power dissipation is comparatively low.

Set the 25-V section of the power supply to 10 V. Referring to Figure 1, connect pin 7(VSS) of the 4011 integrated circuit to circuitground (the COM terminal of the power supply) and pin 14 (VDD) to +10V. Connect pins 1-3 as shown in the circuit in Figure 2, and connect the input pins of the unused gates (pins 5, 6, 8, 9, 11, and 12) to ground. Grounding the unused inputs is necessary because static build-up on the inputs can cause the outputs to fluctuate between logic high and low or to sit at an intermediate value; this creates the potential for high current demand that can upset the normal operation of the chip.

The LED acts as a logic state indicator; when it is lighted, the output of the gate represents a “1.” Note that when a slide switch is in one position the corresponding input voltage is zero, and when it is in the other position the input voltage is high. Using all possible combinations of the switch settings, construct a truth table for the NAND gate. Do your results agree with Table 1?

Figure 1. Pin-out diagram for 4011 CMOS quad NAND gate (top view).

Figure 2. Test circuit for a NAND gate (1/4 of a 4011 quad NAND gate chip). The inputs of the unused gates should be grounded. The small triangles indicate connections to ground.

  1. The NAND gate can be used as a NOT gate. Construct the circuit shown in Figure 3 and find the corresponding truth table.

Figure 3. Test circuit for a NAND gate used as a NOT gate. The inputs of the unused gates should be grounded.

  1. Determine the truth table for the circuit shown in Figure 4. What type of gate could this circuit replace?

Figure 4. Test circuit for an unknown equivalent gate based on two NAND gates from a 4011 CMOS chip. The inputs of the unused gates should be grounded.

  1. Using only NAND gates, design a circuit to implement the OR function as given inTable 1. Build the circuit and confirm that it performs as intended. Show the operating circuit to the instructor or TA.
  1. In the aftermath of Election Day: A community wishes to modernize the vote display board for its township supervisor meetings. You are to design a circuit that turns on a light only if all three supervisors vote “yes” for a proposed ordinance. The light will not turn on if the vote is not unanimous. Implement the voting indicator using only 2-input NAND gates. (You may use as many 2-input NAND gates as you need.) Once the voting circuit is operating properly, demonstrate it to the instructor or TA.

Acknowledgement

This lab hand-out is adapted from one originally prepared by Prof. Sam Craig.

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