Design of Voltage Regulator Module

for

Testing of Magnetic Components

Sean Kelly

B.E. Electronic Engineering Project Report

EE413

April 2005

I hereby declare that this thesis is my original work except where stated

Signature:______Date:______

Abstract

The aim of this project is to design, build and test a voltage regulator module circuit (VRM) that can be used to compare the performance of different magnetic component designs. The VRM will be used to convert the input voltage (typically 12V) to a lower level which will supply a microprocessor load e.g. the Intel Pentium.

The work will include review of VRM circuit topologies for VRM 10.1 specification.

Circuit design will be performed for available controller IC. Simulation and analysis of the circuit in SPICE and characterisation under transient conditions, a circuit will be designed for simulating a transient load change in SPICE.

Finally all required components will be ordered and the circuit will be built and can be used for testing of inductors.

Acknowledgements

I would like to thank my supervisor Dr. Maeve Duffy for the time and effort she put into helping me throughout the year.

I would like to thank my family and friends for all their support throughout my years in college.

I would also like to thank the lab technicians at NunsIsland, Myles, Martin and Aodh for all their help.

Table of Contents

Abstract......

Acknowledgements......

Table of Contents......

List of Figures......

Chapter 1 Project Outline......

1.0 Project Outline......

1.1 Background......

1.2 Report Outline......

Chapter 2 The Buck Converter......

2.0 Description of Buck Converter......

2.1 Operation of Buck Converter......

2.1.1 Continuous Conduction Mode......

2.1.2 Discontinuous Conduction Mode......

2.2 Synchronous Buck Converter......

2.3 Multiphase Topologies......

2.4 Pulse Width Modulation (PWM) Control......

Chapter 3 Intel VRM 10.1 Specification......

3.0 Background......

3.1 Features......

Chapter 4 Component Selection......

4.0 Output Decoupling......

4.0.1 Decoupling guidelines for Intel Xeon Processor with 800 MHz bus......

4.1 Output Inductance......

4.2 Power Switch......

4.2.1 Selection Parameters......

4.2.2 Synchronous MOSFET......

4.2.3 Main MOSFET......

4.2.4 Heat Sinks......

Chapter 5 Analog Devices ADP3188 & ADP3418......

5.0 ADP3188......

5.1 ADP3418......

5.2 Initial Design Spec......

5.3 Design Procedure......

Chapter 6 Computer Simulation......

6.0 Pspice......

6.1 Modifying Circuit......

6.2 Transient Analysis......

Chapter 7 Hardware Implementation......

7.0 Switching Circuit......

7.1 Output Filter......

7.2 Control Circuit......

Chapter 8 Conclusions......

References......

List of Figures

Figure 1.1 Total number of Transistors in Microprocessors has Increased Exponentially

Figure 2.1 Buck Converter

Figure 2.2 State 1 Equivalent Circuit

Figure 2.3 State 2 Equivalent Circuit

Figure 2.4 Buck Waveforms

Figure 2.5 Boundary Between Continuous and Discontinuous Modes

Figure 2.6 Discontinuous Mode

Figure 2.7 Synchronous Buck Converter

Figure 2.8 Multiphase Interleaved Buck Converter

Figure 2.9 PWM Waveforms

Figure 2.10 PWM Generation

Figure 3.1 Load Current vs. Time

Figure 3.2 VRM 10.1 Processor Die Load Line

Figure 4.1 MOSFET

Figure 4.2 MOSFET Equivalent Circuit

Figure 4.3 Temperature of Semiconductor vs. Operating Life

Figure 5.1 Functional Block Diagram of ADP3188

Figure 5.2 Functional Block Diagram of ADP3418

Figure 5.3 Circuit Diagram

Figure 6.1 Buck Circuit

Figure 6.2 Output Voltage Waveform

Figure 6.3 Output Filter Waveforms

Figure 6.4 Modified Buck Circuit

Figure 6.5 New Output Voltage Waveform

Figure 6.6 New Output Filter Waveforms

Figure 6.7 Load Transient Analysis Circuit

Figure 6.8 Light to Heavy Load Transient

Figure 6.9 Heavy to Light Load Transient

Figure 7.1 Switching Circuit

Figure 7.2 Output of Switching Circuit

Figure 7.3 Switching Circuit and Output Filter

Figure 7.4 An Analogue Delay Circuit

Chapter 1. Project Outline1

Chapter 1Project Outline

1.0Project Outline

The work will include circuit design and simulation, component modeling and design and circuit testing.

1.1Background

Moore’s law is the observation made in 1965 by Gordon Moore, co-founder of Intel, that the number of transistors per square inch on integrated circuits had doubled every year since the integrated circuit was invented. Moore predicted that this trend would continue for the foreseeable future. In subsequent years, the pace slowed down a bit, but data density has doubled approximately every 18 months, and this is the current definition of Moore's Law, which Moore himself has blessed. Most experts, including Moore himself, expect Moore's Law to hold for at least another two decades.

The number of transistors per die in microprocessors has increased steadily in the past decade, as shown in Figure 1.1. As a result the microprocessor speeds have increased.

Year of Introduction / Transistors
4004 / 1971 / 2,250
8008 / 1972 / 2,500
8080 / 1974 / 5,000
8086 / 1978 / 29,000
286 / 1982 / 120,000
Intel386™ processor / 1985 / 275,000
Intel486™ processor / 1989 / 1,180,000
Intel® Pentium® processor / 1993 / 3,100,000
Intel® Pentium® II processor / 1997 / 7,500,000
Intel® Pentium® III processor / 1999 / 24,000,000
Intel® Pentium® 4 processor / 2000 / 42,000,000
Intel® Itanium® processor / 2002 / 220,000,000
Intel® Itanium® 2 processor / 2003 / 410,000,000

Figure 1.1 Total number of Transistors in Microprocessors has Increased Exponentially

The increases in microprocessor speeds and transistor number have resulted in an increase in current demands and transition speeds. The supply voltages of the microprocessors have been decreased in order to reduce power consumption.

As Intel predicted, with the continuous advances being made with semiconductor technology, the microprocessors need to operate at significantly lower operating voltages, higher currents and higher slew rates.

These low voltages, high currents and high slew rates are the challenges imposed on power supplies for microprocessors.

The industry standard power supply architecture used is a dedicated DC-DC converter, the voltage regulator module (VRM), placed close to the microprocessor to minimize the impedance between the VRM and the microprocessor.

Voltage regulator modules are a special class of power converter circuits used to supply microprocessor loads e.g. the Intel Pentium. The VRM converts the system bus voltage (typically 12 V) to a lower level.

While current operating voltages are in the range of 1 - 1.5 V, it is expected that the required operating voltages in the next few years will decrease below 1 V while increasing the drawn current (the required current can easily exceed 100A) from the power supply in order to reduce the power consumption while increasing the microprocessor speed.

With such low voltage levels, one of the main challenges of VRM design is to maintain the constant output voltage under varying and transient load (current) conditions, when the microprocessor switches from one state to the other, voltage drop spikes occur, these spikes must be limited.

The main limit is caused by the large inductance values required to maintain ripple levels for steady-state operation. The standard industry solution is a multi-phase buck converter, in which the inductance is distributed between several phases that are controlled in parallel.

A buck derived voltage regulator module (VRM) will be designed to satisfy these requirements.

1.2Report Outline

This report consists of eight chapters. They are organized as follows.

Chapter 1 is a review of how ever improving advances in microprocessors are creating challenges in VRM design. As transistor numbers increase, the required current will also increase while in order to limit power consumption, the output voltage will need to decrease.

Chapter 2 looks into the buck converter topology which is the dominant topology in todays VRM design. The operation of the buck converter is explained and it’s modes of operation are discussed. In order to meet the growing VRM demands multi phase interleaved operation of the buck converter is explored, these phases will be controlled by pulse width modulation (PWM).

Chapter 3 is a review of Intel’s VRM 10.1 specification. Its background is explained and some of the requirements are discussed. The advantages of implementing a voltage regulator module are assessed as opposed to implementing a regulator directly on the motherboard.

Chapter 4 discusses the main components to be selected in the circuit. The capacitance, inductance and switching devices are all reviewed and selections are made.

Chapter 5 analyses two IC’s to be used in the circuit. The ADP3418 is the MOSFET driver; these will be interfaced with MOSFETs to form the switching circuit. The ADP3188 is the controller IC, its capabilities are reviewed, and a step-by-step design procedure is outlined.

Chapter 6 introduces Pspice, the software package used to simulate the circuits in this project. Simulation is performed and analysis of the results is provided.

Chapter 7 outlines the building and testing of the circuit, which consists of the switching stage, the output filter and the control circuit. At this stage the importance of component selection was really appreciated.

Chapter 8 summarises the work and proposes ideas for future work.

Sean Kelly - April 2005

Chapter 2. The Buck Converter1

Chapter 2The Buck Converter

2.0Description of Buck Converter

Figure 2.1 Buck Converter

The most common power converter topology is the buck power converter, sometimes called a step down power converter. Power supply designers choose the buck power converter because the output voltage is always less than the input voltage in the same polarity and is not isolated from the input.

The buck regulator circuit is a switching regulator, as shown in figure 2.1. It uses an inductor and a capacitor as energy storage elements so that energy can be transferred from the input to the output in discrete packets. The advantage of using switching regulators is that they offer higher efficiency than linear regulators. The one disadvantage is noise or ripple; the ripple will need to be minimized through careful component selection.

A requirement of the design is to have high current slew rate (up to 930 A/μs) to increase switching speed of microprocessor from one state to the other but this causes voltage drop spikes at the processor power supply. To achieve high current slew rate the inductor Lo should be as small as possible. This in turn while achieving faster transient response will cause the output voltage ripple to increase.

To reduce output voltage ripple, the switching frequency should be increased but this lowers efficiency. This means that the selection of the switching devices will be an important issue. The output voltage ripple can also be reduced by increasing the output capacitance; this means a large capacitor in practical design.

The input current for a buck power converter is discontinuous due to the power switch, the current pulses from 0 to Io every switching cycle. The output current for a buck power converter is continuous because the output current is supplied by the output inductor/capacitor combination; the output capacitor never supplies the entire load current for continuous inductor current mode operation.

2.1Operation of Buck Converter

2.1.1Continuous Conduction Mode

Continuous inductor current mode is when current flows continuously in the inductor during the full switching cycle. A buck converter operating in continuous conduction mode has two unique switching states during each switching cycle.

This circuit operates as follows.

State 1

Figure 2.2 State 1 Equivalent Circuit

The first state corresponds to the case when the switch is ON.The equivalent circuit is shown in Figure 2.2In this state, the current through the inductor rises, and the energy stored in it increases, during this state the inductor acquires energy.

When the switch is closed, the diode is in the OFF state. The diode is there so there will always be a current source for the inductor.

State 2

Figure 2.3 State 2 Equivalent Circuit

The second state is when the switch is OFF and the diode is ON.The equivalent circuit is shown in Figure 2.3 In this state, the inductor current free-wheels through the diode and the inductor supplies energy to the RC network at the output. The energy in the inductor falls in this state.

***When the switch is open, the inductor discharges its energy. When all of its energy has discharged, the current falls to zero and tends to reverse, but the diode blocks conduction in the reverse direction. In the third state both the diode and the switch are OFF, in this state the capacitor discharges its energy and the inductor is at rest with no energy stored in it.***

There cannot be a net change in flux in the inductor or it would saturate over a number of cycles. The increase in current while the switch is on must exactly equal the decrease in current while the switch is open.

Combining I and II:

Vo = D x Vi

Average output voltage is determined by the duty cycle D of the switch and is less than the input voltage. Shown in figure 2.4 are the waveforms for a continuous conduction mode buck converter.

Figure 2.4 Buck Waveforms

2.1.2Discontinuous Conduction Mode

The inductor current flows into the output capacitor and load resistor combination. The average current flowing in the output capacitor is always zero so the buck converter load current is the average of the inductor current. When the load current is decreased below a critical level, i.e. half the inductor ripple current, the inductor current will be zero for a portion of the switching cycle. In a non-synchronous buck converter, if the inductor current attempts to fall below zero, it cannot due to the unidirectional current flow in the freewheeling diode, and just stays at zero until the start of the next switching cycle.

This operating mode is called discontinuous conduction mode. A buck converter operating in discontinuous conduction mode has three unique switching states during each switching cycle as opposed to two states for continuous conduction mode. The load current condition where the circuit is at the boundary between continuous and discontinuous modes is shown in Figure 2.5. This is where the inductor current (IL) falls to zero and the next switching cycle starts immediately after the current reaches zero.

Figure 2.5 Boundary Between Continuous and Discontinuous Modes

If the load current is decreased further, the circuit is put into discontinuous mode. This condition is shown in Figure 2.6

Figure 2.6 Discontinuous Mode

2.2Synchronous Buck Converter

A variation on the buck converter is the synchronous buck converter. In this circuit, a switch such as another power MOSFET replaces the rectifier diode. Choosing a MOSFET with a very low on resistance (RDS(ON))increases the efficiency of the circuit. The control circuit used must ensure that both MOSFETs are not on at the same time. This would place a very low resistance path from the input to ground and destructive currents would flow in the switches.

The synchronous buck converter always operates in continuous conduction mode because current can reverse in the synchronous MOSFET. So the voltage conversion relationship and the duty cycle to output voltage transfer function for the synchronous buck converter are the same as for the continuous conduction mode buck converter.

Figure 2.7 shows a simplified schematic of a synchronous buck converter, with control circuit block included, which is the dominant topology in applications today for desktop and notebook. Both power switches are N-channel MOSFETs.

Figure 2.7 Synchronous Buck Converter

2.3Multiphase Topologies

In the past VRMs used a single conventional buck or synchronous buck topology for power conversion. They operated at lower switching frequencies with a higher filter inductance which limited the transient response. In order to meet microprocessor demands huge output decoupling capacitors were needed.

To reduce VRM output capacitance, a larger inductor current slew rate is needed. Smaller inductances give larger inductor current slew rates, but smaller inductances result in larger ripple currents in the circuits steady state operation. These current ripples result in large output voltage ripples. It is impractical for the circuit to operate in this way.

A solution to reducing the large current ripples in the VRMs is to use interleaving technology. Interleaving reduces the current ripple to the output capacitors, which in turn reduces the steady state output voltage ripple. This allows the use of smaller inductances in the VRM to improve transient response. Using smaller inductances means smaller output capacitance can be used to meet VRM requirements.

While there is no real limit for a single phase buck regulator, the advantages of designing with multiphase converters become apparent as load currents increase to theirpresent large values.

These advantages include:

Reduced input-ripple current.
Substantially decreasing the number of input capacitors.
Reduced output-ripple voltage due to an effective multiplication of the ripple frequency.
Reduced component temperature achieved by distributing the losses over more components
Reduced-height external components.

The topology of a multi-phase buck converter is shown in Figure 2.8. It consists of n identical converters with interconnected inputs and outputs.

Figure 2.8 Multiphase Interleaved Buck Converter

Multiphase converters are essentially multiple buck regulators operated in parallel with their switching frequencies synchronized and phase shifted by 360/n degrees, (where n identifies each phase). Paralleling converters makes output regulation slightly more complex. This problem is solved with a current-mode control IC that regulates each inductor current in addition to the output voltage.

The concept of applying interleaving to VRMs is so successful that it has become the standard practice in VRM industry.

The main benefit of multiphase technology is the ripple cancellation effect, which allows the use of small inductances to improve transient responses and minimize output capacitance.

2.4Pulse Width Modulation (PWM) Control

Switch mode converters use a power semiconductor switch (usually a MOSFET) to drive a magnetic element (inductor) whose rectified output produces a dc voltage. A common method of controlling this type of circuit is pulse width modulation (PWM), which controls the power switch by applying a voltage signal to its gate and varying its ON and OFF times. The ratio of ON time to switching period is the duty cycle. Figure 2.9 shows three different variations of PWM duty cycle, 10%, 50% and 90%.