Project 12
Cascade Amplifier
Objective: This project will show the overall gain, frequency response, and coupling of a common emitter - common collector cascade amplifier.
Components: 2N2222 BJT
Introduction:
Multistage amplifiers are made up of single transistor amplifiers connected in cascade. The first stage usually provides a high input impedance to minimize loading the source (transducer). The middle stages usually account for most of the desired voltage gain. The final stage provides a low output impedance to prevent loss of signal (gain) and to be able to handle the amount of current required by the load. In analyzing multistage amplifiers, the loading effect of the next stage must be considered since the input impedance of the next stage acts as the load for the current stage. Therefore, the AC analysis of a multistage amplifier is usually done starting with the final stage. The individual stages are usually coupled by either capacitor or direct coupling. Capacitor coupling is most often used when the signals being amplified are AC signals. In capacitor coupling the stages are separated by a capacitor which blocks the DC voltages between each stage. This DC blocking prevents the bias point of each stage from being upset.
The CE-CC cascade two stage amplifier is a good multistage configuration because the CE and CC amplifiers together provide some very desirable characteristics. The CE amplifier makes up the first stage and is capable of providing high voltage gain. The input impedance of the CE is a function of hie (r) and can be moderately low for high bias currents, but several kilohms for low current operating points. The output impedance of the CE is approximately equal to RC, which is usually in the kilohm range. The CC amplifier makes up the second stage and has the characteristic of high input impedance, low output impedance, high current gain, and a less than unity voltage gain.
In a cascade configuration, the overall voltage and current gains are given by:
AV overall = AV first stage * AV second stage
AI overall = AI first stage * AI second stage
Design:
1. Find the overall voltage gain for the CE-CC cascade amplifier using the circuits from either labs 9 and 10, or from lab 11. Remember to take into account that the load resistances and input impedances are now different for the multistage amplifier.
2. Find a suitable value for C12 to capacitively couple the first and second stages. Think of C12 as an output coupling capacitor for the first stage and make sure that C12 does not cause a dominant pole by making:
NOTE: C12 Must be Non-polarized
Figure 12 - 1: CE - CC Cascade Amplifier
NOTE: C12 Must be Non-polarized
Figure 12 - 2: CE - CC Cascade Amplifier with current source biasing
Pre-Lab Procedure for Lab 13: (This information is needed for the required Lab 13 designs)
Note:
The MOSFET can be easily damaged by static electricity, so careful handling is important
1. Find the value of the threshold voltage VT and conductivity parameter K from the digital curve tracer (remember the relation ID = K[VGS - VT]2 in the saturation region).
2. Determine the value of rds from the digital curve tracer. The slope of the transistor
ID-VDS curves in the active region is 1/rds.
Lab Procedure:
Construct the CE-CC cascade amplifier as shown in Figure 12-1 or Figure 12-2 using the component values from the appropriate CE and CC lab(s) [Projects 9 and 10 or Project 11] along with the value of C12 calculated in the Design section. Make the following measurements.
1. Measure the midband voltage gains VO1/VS, VO/Vi2 for each individual stage and the overall voltage gain VO/VS for the entire cascade amplifier. Be sure to monitor the output on the oscilloscope to make sure the waveform is not clipped. Compare with the results of the previous related lab(s).
2. Measure the input impedance seen by the source and the output impedance seen by the load resistor. See CE and CC lab for measurement method. Compare with the results of the previous related lab(s).
3. Use computer control to record and plot the frequency response of the cascaded amplifier. Find the corner frequencies and bandwidth.
4. Find the maximum, non-distorted output voltage swing.
5. Now, using the same component values, reverse the order of the stages making the CC the first stage and the CE the final stage. You should check the value of C12 since the impedances are changed. Repeat steps 1-4 above. What effect does this stage reversal have?
Questions:
1. Compare AV1 and AV2 to the voltage gains of the previous related lab(s). Why are the gains the same or different?
2. Does the cascade circuit of Figure 12-2 require two separate current sources or can it be constructed using one current mirror (Widlar for example) with two load branches? Justify/explain your answer.
3. For the cascade configuration, can the output impedance of the first stage be matched to the input impedance of the second stage when the cascade amplifier is a CE-CC? What about for a CC-CE combination?
4. What effect, if any, would matching the output impedance of stage one with the input impedance of stage two have on the voltage and current gains?