Mechatronics HC12 Review sheet:
Summary: Parallel I/O on Ports A & B (S12 Advance Information, Bus Control, Pgs. 128)
1. Set DDRA/DDRB to indicate PortA/PortB pins are inputs (0) or outputs (1)
2. Write to the specified port to use as an output, read if an input.
3. Note: AND PORT with a mask to do bit-wise data read/write
Summary: A/D Programming (S12 Advance Information, Analog to Digital Converter, pg. 555)
1. Power up the A/D by setting the ADPU bit in ATDCTL2
2. Wait for 100 microsec. Before using the A/D
3. Select number of conversions by setting ATDCTL3
4. Select the resolution and sample time, ATDCTL4
5. Choose DJM, DSGN, SCAN, MULT and CC-CA bits in ATDCTL5
6. Write to ATDCTL5 to start the conversion
7. Wait for the conversion sequence to complete by polling the SCF bit in ATDSTAT
8. Read the result in the ATDDR0H-ATDDR7H register
Summary: Using the Basic timer – Real Time interrupt(S12 Advance Information, Clock and Reset Generator, Pgs 257 on)
1. clear Real Time Interrupt Flag (RTIF) on CRGFLG (clock reset generator register) pg. 281 (by writing a 1 to RTIF).
2.Set Real Time Interrupt Enable bit (RTIE) on CRGINT (clock resent generator interrupt register) pg 283
3. Set RTI frequency on RTICTL (Real time interrupt control register) pg 287
4. Enable interrupts
5. Place reoccurring code in RTI subroutine.
Summary: Using the Basic timer- using TCNT/TOF(S12 Advance Information, Enhanced Capture Timer, Pgs 257 on)
1. Clear the timer overflow flag (TOF) in the Timer Flag Register 2 (TFLG2) pg 364
2. Enable the timer by setting the TEN bit in TSCR, pg 359
3a. Poll the TOF bit in a loop for longer time periods, or
3b. enable TOF interrupt, TOI bit in TSCR2 pg 363, place code in TOF interrupt to count timer overflows, and/or
3c. Read the current time in TCNT, add to that time an offset, and then do a branch compare for a future time
Summary: Using the PWM function (S12 Advance Information, Pulse Width Modulating, pg 297 on)
1) Select clock (A/SA, B/SB) on PWMCLK (PWM Clock register)
2) Select polarity on PWMPOL (PWM Polarity register)
3) Select 8bit or 16 bit PWM – PWMCTL (PWM Control register)
4) Select the clock prescaler PWMPRCLK (PWM prescale clock)
5) Select the prescale for clock SA or SB: PWMSCALA, PWMSCALB (PWM Scale A, scale B register)
6) Set PWM Period: PWMPERx (PWM period x register)
7) set PWM dutycycle: PWMDTYx (PWM duty x register)
8) Enable PWM for each PWM channel: PWME (PWM enable register)
9) watch it run.
Summary: Output Compare Software Checklist(S12 Advance Information, Enhanced Capture Timer, Pgs 257 on)
1. Initialize the interrupt vectors for each timer channel to be used (as appropriate)
2. Turn the timer system on, by writing a 1 to bit 7 in TSCR (enable the timer).
3. Configure the timer channels as either input captures or output compares (as desired). Set bits in the TIOS register to enable timer pins as output compares.
4. Configure the TCTL1 and TCTL2 bits (OMn and OMl) to cause output compare bits to go hi, lo, or toggle.
5. Load the current timer value (TCNT) into ACCD and add the desired delay to it.
6. Store ACCD (TCNT + delay) into the 16-bit Timer Compare register TCn (n = 0-7 for each of the 8 timer channels).
7. Reset the corresponding Input Capture/Output Compare Channel Flags (CnF) in TFLG1 (Reset by writing a 1 to the flags).
8. Enable the required interrupts in TMSK1 by setting these bits high.
9. Unmask global HC12 interrupts in the CCR with the CLI command.
10. Wait for the output compare through polling or interrupts (CnF is set).
11. Upon successful compare, reinitialize TCn with a new delay value (TCn + delay).
12. Reset the CnF bit (interrupt flag bit).
Summary: Input Capture Software Checklist(S12 Advance Information, Enhanced Capture Timer, Pgs 257 on)
1. Initialize the interrupt vectors for each timer channel to be used (as appropriate)
2. Turn the timer system on, by writing a 1 to bit 7 in TSCR (enable the timer).
3. Configure the timer channels as input captures (as desired). Reset bits in the TIOS register (to zero) to enable timer pins as input captures.
4. Configure the TCTL3 and TCTL4 register bits, EDGnB and EDGnA to select the type of edge to cause the input capture trigger.
5. Reset the corresponding Input Capture/Output Compare Channel Flags (CnF) in TFLG1 (Reset by writing a 1 to the flags).
6. Enable the required interrupts in TMSK1 by setting these bits high.
7. Unmask global HC12 interrupts in the CCR (clear the I bit in the CCR)with the CLI command.
8. Wait for the input capture to trigger through polling or interrupts (CnF is set).
9. After the input capture event occurs, read the data in TCn register and use according to your application.
10. Reset the CnF bit (interrupt flag bit).
Summary: General Procedure to Use Interrupts
1. Globally Mask or unmask interrupts: This is done by setting the I and X bits in the condition code register (CCR). To globally allow all interrupts, execute the command:
ANDCC #%11101111
To globally mask all interrupts, execute the command: ORCC #%00010000
2. Define Interrupt System Vectors: (Note, this is the only complicated part of the whole process, stick with it) Interrupt system vectors allow the CPU to branch to the proper service routine for that request. In the general case, when an interrupt request is generated, the CPU fetches the address of the ISR from the vector location. The CPU then branches to execute the ISR.
3. Enable local interrupts and use accordingly
4. End interrupt service routines (ISR) with the command RTI