IEEE-1394 Data Link

IEEE-1394 Data Link

for 3-D RF Video Control

of Remote Control Car

ECE4040 Background Report

September 26, 2000

Sherry Womack

Erik Pace

Introduction

As the world moves towards a state of greater connectivity through various networks, people will need to find ways to share their data no matter what form in may be in. One area of interest is that of sharing video and still images. It is important that the form of transfer is fast, easy, inexpensive, and involves no image degradation. The IEEE 1394 multimedia connection enables simple, low-cost, high-bandwidth isochronous (real-time) or asynchronous data interfacing between computers, peripherals, and consumer electronics products such as camcorders, VCRs, printers, PCs, TVs, and digital cameras. Using IEEE 1394-compatible products, users can achieve all of the goals listed above.

The idea for the 1394 connection was first conceived in 1986 by developers at Apple Computer. They chose to name the technology FireWire in reference to its speeds of operation. Eventually in 1995, 1394 was adopted as an industry standard by the Institute of Electrical and Electronics Engineers Standards Board and given the official name IEEE 1394-1995 Standard for a High Performance Serial Bus. The 1394 Trade Association was formed in 1994 to increase the use of the standard by industry electronics manufacturers. The IEEE-1394 standard was dubbed the Multimedia Connection by the 1394 Trade Association.

There are many significant advantages of the 1394 standard over the other current and proposed serial buses. These advantages include:

• Versatility: IEEE-1394 provides a direct digital link between up to 63 devices without the need for additional hardware, such as hubs. Digital Video (DV) camcorders, scanners, printers, videoconferencing cameras, and fixed-disk drives all share a common bus connection not only to an optional PC, but to each other as well. IEEE-1394 is a candidate for the "Home Network" standard initiated by VESA (Video Electronic Standards Association) and other industry associations.
• High speed: The present implementation of IEEE-1394 delivers 100 Mbps (Megabits per second), 200 Mbps, or 400 Mbps of data (payload) and control signals (overhead). Future versions that support 1.2 Gbps are in the development stage. All of these speeds are supported on a single continuous cable making IEEE-1394 scalable. Isochronous data transmission lets even the lowest-speed implementation support two simultaneous channels of full-motion (30-frame-per-second), "broadcast quality" video and CD-grade stereo audio. Full-frame digital video contains an immense amount of information and it requires a constant frame rate (usually 30 frames per second) to provide a high quality image. IEEE-1394’s transfer rates are more than enough to handle the digital video frame rates.
• Low cost: The cost of the integrated circuits and connectors to implement IEEE-1394 is often less than the cost of the connectors and circuitry it replaces. 1394 uses a flexible, six-conductor cable and connectors derived from Nintendo's Gameboy to interconnect devices. (A four-conductor version of the standard cable is used to interconnect consumer audio/video components.) Use of IEEE-1394 for consumer electronics gear, such as camcorders and VCRs, will provide the high-volume market needed to achieve low-cost implementation of IEEE-1394 on PCI adapter cards and PC motherboards.
• Ease of installation and use: IEEE-1394 extends Plug and Play features far beyond the confines of the personal computer. When you add a new device, 1394 automatically recognizes the device; similarly, on disconnect 1394 automatically reconfigures itself. The standard 1394 cable provides up to 1.5 amps of DC power to keep remote devices "alive" even when they're powered down. You don't need a computer to take advantage of IEEE-1394; as an example, a VCR can act as a 1394 controller for camcorders, TV sets, receiver/amplifiers, and other home theater components.

How IEEE 1394 Works

The IEEE-1394 High Performance Serial Bus is a remarkable feat of engineering that has occupied many highly-creative digital circuit designers and software programmers for the past 10 years. IEEE-1394 is a very complex serial bus protocol, as evidenced by the hundreds of pages that comprise its standard specification. The following list is a very simplified description of the external and internal workings of the IEEE-1394 bus:

• Standard cables and connectors replace the myriad of I/O connectors employed by consumer electronics equipment and PCs. IEEE-1394 multiplexes a variety of different types of digital signals, such as compressed video, digitized audio, MIDI, and device control commands, on two twisted-pair conductors. Multiplexing is used in virtually all analog and digital networking systems, but usually only a single type of signal is involved. As an example, Ethernet multiplexes digital data streams from workstations and servers over one (10Base2, "Thin" Ethernet) or two (10BaseT, 100BaseT) pairs of conductors. (1394 cabling is quite similar to that of 10BaseT Ethernet.) Sending real-time, high-quality audio and video data over Ethernet, however, requires special protocols presently implemented only by proprietary multimedia networking systems. IEEE-1394 is much more flexible in its accommodation of different data types and topologies than alternative networking systems. IEEE-1394 uses a "fairness" arbitration approach to assure that all nodes having information to transmit get a chance to use the bus; standard Ethernet does not provide this type of arbitration.
• Special integrated circuit chips implement the IEEE-1394 protocol. Like Ethernet and other high-speed digital data transmission systems, 1394 is a layered transport system. The IEEE-1394 standard defines three layers: Physical, Link, and Transaction (see Figure 1.). The Physical layer provides the signals required by

Figure 1. The 1394 Protocol Stack and Serial Bus Management Controller.

the 1394 bus as well as the initialization and arbitration services necessary to assure that only one node at a time is sending data and to translate the serial bus data stream and signal levels to those required by the link layer. The Link layer handles all packet transmission and reception responsibilities, plus the provision of cycle control for isochronous channels. The Link layer also supplies an

acknowledged datagram to the transaction layer. The Transaction layer takes the packets from the Link layer and presents them to the application. Link chips provide all link functions as well as a limited number of transaction functions. The remainder of the transaction functions are performed in software.

As shown in Figure 2., the standard 1394 cable actually consists of six wires. Data is sent via two separately-shielded twisted pair transmission lines. The two twisted pairs are crossed in each cable assembly to create a transmit-receive connection. Two more wires carry power (8 to 40V, 1.5A max.) to remote devices. Currently, these power lines are rarely used. The wires terminate in gameboy-style plugs, also shown in the figure.

Figure 2. IEEE-1394 Cable Design.

PC Board Design

The PC Board designed by the previous group contains the Physical layer and the Link layer. The Physical layer carries out the arbitration, data resynchronization, bus initialization, and it also controls the encoding and decoding, the signal levels, and the connectors and media. The Link layer is responsible for packet transmission, packet receiving, and for cycle control. The original design also included a microprocessor connected to the link layer. The chips chosen for the layers are described below.

The chip for the Physical layer was Texas Instruments TSB41LV03A IEEE 1394a Three-Port Cable Transceiver/Arbiter. It provides the digital and analog transceiver functions needed to implement a three-port node in a cable-based IEEE 1394 network. Each cable port incorporates two differential line transceivers. The transceivers include circuitry to monitor the line conditions as needed for determining connection status, for initialization and arbitration, and for packet reception and transmission.

The chip chosen for the Link layer was TSB12LV42 (DVLynx) IEEE 1394-1995 Link-Layer Controller for Digital Video, which is also made by Texas Instruments. It is a 1394 interface for high-speed audio, video, and data applications at up to 200 Mb/s. On the TSB12LV42 a bulky data interface (BDIF) is implemented that supports long term data rates up to 60 Mb/s. Burst data rates, however, can go up to 160 Mb/s. The TSB12LV42 contains two FIFOs that are a 256-byte control FIFO (Control FIFO) and an 8K-byte BDIF FIFO. These two FIFOs are further subdivided into smaller logical FIFOs. Bulky data is usually buffered in the BDIF FIFO. The BDIF FIFO supports DV, asynchronous, and isochronous formatted traffic for receive and transmit. Based on destination address, received asynchronous request packets may be steered into either the Control FIFO or the BDIF FIFO.

A schematic of the connections between the Physical and Link layers is shown in Figure 3. A microprocessor is also included in this design.

Figure 3. Physical and Link layer connections.

Cable connections and power decoupling networks were found in the TSB41LV03A/ TSB12L42A Reference Schematic provided by Texas Instruments. This schematic is shown in Figure 4.

Figure 4. Cable connections and power decoupling network.

The PC Board Layout created by the previous group is shown in Figure 6. It contains the Physical and Link layers, but omits the connections to the processor and cable.

Figure 6. PC Board Layout for previous design.

After researching the previous group’s design, several key areas were found that need to be addressed in the new design. The physical positioning of the chips on the PC Board layout needs to be adjusted to account for high frequency transmission line effects. Also the etch lengths of the TPA+, TPA-, TPB+, and TPB- lines connecting the physical layer to the cable need to be checked to insure that their lengths are equal to insure that data transmission is synchronous with the clock. The format of the data sent from the physical layer to the link layer needs to be determined as to whether it is asynchronous or isochronous. The power decoupling network also needs to be added to the design. The initialization state of the board also needs to be determined. The parts list provided by the previous group for the PC Board contains several parts that were unavailable and listed with incorrect values. The parts list therefore needs to be updated. The new design should specify whether a microprocessor/ microcontroller should be used in conjunction with the physical and link layer or whether a PC could be used to act as the processor.

Also the frequency of the clock was not specified in the previous design, and the new design needs to include this specification.

Web Site References

1. Organizations

1. 1394 Chip Manufacturers

1. Technical Papers