FACULTY OF ENGINEERING

LAB SHEET

ETM 3136

Digital Communications

TRIMESTER 1 (2013/2014)

Experiment DTL2: Bandpass Digital Modulation

Important Notes:

  • Students MUST read this lab sheet before attending the lab. Oral assessment could be conducted on-the-spot.
  • The lab report is to be submitted within two weeks.

Experiment DC2: Bandpass Digital Modulation

Objectives

  • To examine bandpass digital modulation schemes - ASK, FSK, and PSK.
  • To study the effect of channel impairments on the bit error rate of bandpass digital modulation schemes.
Basic Concepts
Telecommunications is the art of transmitting information from one location to another. Whatever the starting information is, e.g., a voice signal, a video signal, a telegraph signal, etc., it turns out to be advantageous in many cases to code the information into pulse trains. The step following the "coding" process is transmission.

A recurrent problem with transmission of pulse trains is the inherently wide frequency spectrum of these digital signals, which make them difficult to transmit without distortion over band-limited transmission systems. When a digital signal in its primitive form or "BASEBAND" is applied to one end of a long-distance transmission path, the chances that it will arrive at the other end in a recognizable form is remote. Main causes are the amplitude and phase characteristics of the transmission system. The amplitude characteristic causes a different attenuation of the signal components, while the phase characteristics destroys the phase relationship between the harmonic components of the original signal. The combined effect of the amplitude and phase characteristics on the transmitted signal results in an alteration of the received signal.

Digital modulation is a process similar in principle to the analog modulation. The information to be transmitted is encoded into a wave, named "CARRIER WAVE" which can be transmitted over the system, to be detected and decoded at the other end. Since the parameters characterizing a wave signal are its AMPLITUDE, its FREQUENCY, and its PHASE, depending on which of these parameters is used as a vehicle for the encoded information, we have Amplitude Modulation (AM), Frequency Modulation (FM), and Phase Modulation (PM).

In the case of digital modulation of a carrier wave, AM, FM, PM takes the name of AMPLITUDE SHIFT KEYING (ASK), FREQUENCY SHIFT KEYING (FSK), and PHASE SHIFT KEYING (PSK).

Experimental Set-Up

The experimental set up consists of two subsystems: (a) B43.40-P Digital Signal Transmission Trainer and (b) B43.50-P Transmission Channel Simulator. The students are recommended to read this section thoroughly before starting the lab work.

(a)The B43.40-P Trainer (Fig. 1): It groups on a single module all the circuit blocks to construct sample transmission systems to study and investigate various aspects of digital modulation and transmission. The panel also includes auxiliary items such as a timing generator and a pseudo-random data sequence generator which can be set to deliver short (15 bit) and long (255 bit) sequences of data. The panel also includes a Data Matching circuit allowing measurements of Bit Error Rate. The trainer is powered by a stabilized source of DC supply at +15 and -15 V.

TIMING GENERATOR. This block consists of a quartz controlled master oscillator, working at 2.4576 MHz, from which the basic timings at 600, 1200, 2400, .….., 19200 bits per second are obtained. These figures correspond to the industry-standard Bit Rates for data transmission.

TEST SEQUENCE GENERATOR: The Sequence Generator essentially consists of an EPROM memory device in which two standard data sequences are stored. The EPROM is read cyclically in synchronism with the CLOCK signal generated by the master timer. The test sequences are pseudo-random series of "ONES" and "ZEROES" to be used as sample data streams during the experiments.

The two sequences are selectable by means of a switch: The short one is only 15 bit long, sufficiently short to be displayed clearly on an oscilloscope screen. This facilitates following and tracing the data signal along the transmission system under study. The long one is 255 bit long and resembles more than the other to a random sequence. None of the sample strings are of course truly random since they are repeated periodically. For this reason these types of test sequences are often referred to as PSEUDO-RANDOM. The long sequence is suitable to be used for measurements of BER (Bit Error Rate) since it is a better approximation of a random sequence.

LINE CODERS - This block receives as inputs the clock signal and the data stream in the TTL format and constructs the signals to be sent on line in three different standard line codes: the NON-RETURN-TO- ZERO (NRZ) code, the RETURN-TO-ZERO (RZ) code, and the DIFFERENTIAL code.

Line coding is essentially provided to facilitate the operation of the receiving end and of the intermediate signal repeaters possibly provided along the transmission path. Another good reason for line coding is that any receiving end surely includes a clock regenerator, which monitors the incoming sequence to determine the timing for operation of the receiver. The clock regenerator must "lock" on the incoming string but might have difficulties to operate in case of long sequences of "ONES" and "ZEROES". Some standard line codes artificially introduce transitions in the transmitted sequences for this purpose.

The NRZ code is the simplest code in which "ONE" is represented by a high-level bit at TTL level and "ZERO" is represented by a low TTL level. The RZ code uses for the "1" a wave shape, which is at high level for one half bit - time - length and at low level for the remaining time. The "0" is coded by a LOW TTL level lasting for a duration equal to one bit-time. In the DIFFERENTIAL code if a "ZERO" is to be transmitted, the transmitter changes the signal level from its present value to the other value. Thus if the signal level were LOW at the time a ZERO inputs the transmitter, a LOW to high signal transition occurs. To transmit a "1" no change of level is performed by the transmitter in the following bit-interval. Note that at the receiver, the observation of the absolute value of each single bit during any given time-interval is not sufficient to detect which of the two possible data bits is being sent. One must compare the value of the present bit with the previous one. This gives certain advantages in the implementation of the detector but leads to a surprising effect: if a bit is incorrectly received, the whole following sequence will be inverted in sign (complemented). This is usually overcome by other means included in the transmitted sequence, not dealt within this simple training module.

ASK MODULATOR - This block is provided with two inputs, one for the carrier, the other for the TX-input digital signal. The typical wave shape appears like an AM wave with 100% modulation index.

PSK MODULATOR - This block receives the carrier input generated by the timing generator as one input and constructs from this a 180-degrees-shifted signal. The actual and the phase- shifted carriers are selected by an electronic switch controlled by the level of the data to be transmitted: the true carrier is therefore being sent when the bit-value is a "ZERO" and the phase-shifted (inverted) version is sent when the bit value is a "ONE".

FSK MODULATOR - This block consists of a Voltage-Controlled Oscillator (VCO) whose control input is being supplied by a DC voltage level Vo to determine the rest frequency of the VCO, plus the voltage of the digital signal to be transmitted. The VCO is followed by a filter, a low-Q tank circuit to limit the bandwidth of the resulting FSK signal to the strictly required for a safe intelligence at the receiver. The output filter has obviously the effect to impress a certain amount of AM to the FSK signal. This is not an important effect in the FSK systems since all of them include in the receiver a limiter circuit to take care of the amplitude variation.

RX AMPLIFIER - This is an amplifier handing over the signal received from the transmission system to the three detectors in parallel.

AM DETECTOR - This is an envelope-type of AM detector, well known by the students. The performance of the detector is mainly determined by the RC time-constant of the subsequent filter. The performance is good when the frequency of the carrier is high compared to the frequency of the modulating signal – it worsens rapidly as this condition is not satisfied. This may be seen during the experiment by examining the wave shape of the regenerated data at progressively rising bit rates.

FSK DETECTOR - This converts the frequency variations into amplitude variations. The resulting signal is then demodulated as if it were an AM signal.

PSK DETECTOR - This is a coherent type of detector and regeneration of the carrier is required to provide the demodulating carrier. This is accomplished by a PLL circuit locking on the receiving signal and provided with transient response slow enough to be insensitive to the rapid phase changes of the incoming signal. PSK detection is achieved by heterodyning the carrier and the modulated carrier and then filtering out the high-frequency terms.

CLOCK REGENERATOR: This circuit block basically consists of a PLL system whose free running frequency can be adjusted over a wide range by means of a potentiometer (P3). Once brought manually to work at a frequency near to the Bit per second rate of the incoming data stream, the PLL "captures" this signal and locks on to it, thus producing a square wave output, which is a replica of the TX clock.

The clock regenerator includes a LED lamp to indicate the LOCK condition for the circuit. A light ON condition means that the clock regeneration is successfully taking place. The knob must always be adjusted for maximum light intensity. Operation of the regenerator at the edges of the capture range is not a safe condition since loss of locking may then erratically occur giving the impression of a system mal-operation or producing an excessively high Bit Error Rate.

DATA REGENERATOR: It basically consists of a shaper for the pulses handed over by the demodulators. It includes a threshold circuit to decide whether a given bit value is a LOW or a HIGH and a sampler which allows this decision to be made roughly at the middle of each incoming bit interval.

LINE DECODERS: They perform the complementary function of the line coders of the transmitter, thus restoring the original TTL / NRZ appearance of the original data. Line coders / decoders include gates, flip-flops and other logic devices to perform the required tasks, which may introduce a definite (and hopefully constant) delay at the output compared to the original transmitted sequence. This delay adds up to the obvious transmission delay due to propagation time of signals along the transmission path.

DATA MATCHER: This auxiliary device is provided on-board the B4340 to facilitate the Bit Error Metering, i.e., the numeric evaluation of the transmission quality. This circuit is basically an "EXCLUSIVE OR" circuit and a sampler. The inputs to the EX-OR are respectively the transmitted and the received signals. The output of the EX-OR is active (high) whenever a mismatch occurs between the two. The sampler produces a pulse at the ERROR COUNT output for each mismatched bit. The errors can be lumped by an external event-counter over a given time-interval, to calculate the BER parameters. The event-counter can be a common frequency counter.

(b)The B43.50-P Simulator (Fig. 2): It is a transmission-media simulator for digital signals allowing a graded and calibrated attenuation and noise to be inserted between a transmitter and a receiver. This is to study the performance of these systems in an artificially generated environment closely reflecting the real environments. The B4350 module includes an adjustable attenuator. The control knob has a graded 0 to 100% in steps of 5%.

The input selector "DC COMPONENT ON/OFF" allows the operator to remove a possible DC superimposed to the digital string. This turns out useful especially when working with receivers having an input threshold at 0 Volts, requiring attenuation to be applied equally to the high-going as well as the low going signal edges. The normal position for this switch is "ON".

Noise generator produces noise signal whose amplitude can be adjusted by another graded knob.

The 3-position switch (S ONLY / S+N / N ONLY) allows to pass to the output the Signal only or the Noise only, or both. This is to facilitate measurements at the output of the S and N terms without touching the knobs. The normal position for this switch is S + N.

Balanced modulator shifts the frequency spectrum of the noise as required to perform experiments with ASK / PSK / FSK. The carrier at the appropriate frequency has to be applied to the CARRIER IN connector by an external generator. A magnitude of 500mVpp is more than sufficient to operate the balanced modulator. Do not exceed the value of 1Vpp.

The BB/RF switch allows to select the "BASEBAND" noise or the frequency-shifted noise, the 'RF NOISE".

Experimental Procedure

Part A: AMPLITUDE SHIFT KEYING (ASK)

  1. Set up the B43.40 Trainer as shown in Fig. 3.

Note: Connect the various blocks by jumper cables of length as short as possible to limit noise pickup and interference. Use colors to help you in visual checks of the connections you make.

  1. Set the bit rate at 600 bps (bits per second) and select the word length S (short).
  2. Set the line coding scheme to NRZ.
  3. Set the oscilloscope on External Trigger mode and synchronize using the appropriate TRIG signal delivered by the panel.
  4. Switch on the power. Carefully adjust the potentiometer P3 to lock the clock regenerator to the incoming data string. Locking is achieved when the LED indicator is fully ON.
  5. Observe the waveforms of the transmitted and received data bits on the oscilloscope. Compare their relative amplitudes and time delays. Since channel attenuation and noise are negligible in this case, you should observe similar waveforms for both transmitted and received data bits.
  6. You can also use the oscilloscope to observe the waveforms at the modulator input and output. Draw the waveforms and explain their relationship.

Part B: FREQUENCY SHIFT KEYING (FSK)

Repeat Part A with circuit connections as shown in Fig. 4.

Part C: PHASE SHIFT KEYING (PSK)

Repeat Part A with circuit connections as shown in Fig. 5.

Part D: DATA TRANSMISSION IN NOISE-IMPAIRED ENVIRONMENT
  1. Use the set-up shown in Fig. 6 to interconnect B4340 Trainer and B4350 Transmission Channel Simulator. Note that this channel simulator also needs power supply. With this set-up, we artificially inject channel attenuation and noise to observe their impact on the bit error rate (BER) performance. BER = number of bit errors / total received bits. Example, if 1 bit error occurs for every 1,000 bits received, then BER = 10-3.
  2. Use the NRZ coding to experiment with BER measurement. Note that you MUST use the oscilloscope probe (not the function generator probe) to measure the error count.
  3. Set the transmission rate at 600 BPS. Select the Long Word length.
  4. Configure the universal counter as a frequency counter with 1s observation period (it means that whatever value shown is the number of counts collected within 1s); use the Input A terminal with attenuation to 1/10, set the frequency range to 10 MHz. Make sure that all oscilloscope probes are set to unity scale (not scale of 10).
  5. Note that the 100% on the attenuation knob means no attenuation and 0% means maximum attenuation. Set the signal attenuation knob to 100% (no attenuation) and noise level to 0% (no noise). Observe the waveforms of the transmitted and received bits on the oscilloscope. Under this circumstance, you should observe almost identical transmitted and received bits, and the error count shown should be very small (typically 0.000-0.003 kHz = 0-3 errors/second). Thus if you obtain 0.001 kHz (= 1 error), the BER is 1/600 since a bit rate of 600 bps is used. If you change the bit rate, then you need to recalculate the BER. [Note: If you use other observation interval for the frequency counter, say 10s, then the error counts shown needs to be divided by (10bps) to obtain the BER.] If you do not obtain very low BER in this noiseless and lossless case, check your circuit connections and troubleshoot until you achieve this.
  6. You can now increase the noise level and you should observe that the received bits become noisy and the error count will also increase. With different combinations of attenuation and noise levels, different BER results can be obtained. You can, for example, set the attenuation knob to 100%, then increase the noise level from 0% to 100% with a step of 10%. From this, you obtain 10 BER results and you can then plot the results in the form of a graph (noise level v/s BER) given a fixed signal attenuation level.
  7. Repeat step 6 with other values of attenuation knob, e.g., 70%, 50%, 20%, 0%.
  8. If you still have time, repeat steps 1-7 for PSK and FSK modulators.
  9. What do you conclude from your plots?