EE 2441 Syllabus/Instructions

EE 2441 Syllabus/instructions

Fall 2012- MohammadrezaJahangirmoghadam

Office hours: Tue-Th 11-12 IEEE mentoring office / I will also be present at all the lab sessions according to schedule of my other classes.

Email: I will do my best to answer your emails as quickly as possible. Please allow me 24 hours to answer all of your emails. Please use a separate and proper email subject for lab reports and other questions. Like “EE2341_LabXX” and “EE2341_Question/Request/etc”. You are required to check your emails and blackboard system regularly for the files, handouts and other notifications.

Catalog Data

EE 2341 DIGITAL CIRCUITS DESIGN: Theory and design of digital logic circuits. Review of number systems and binary arithmetic. Boolean function theorems and minimization by algebraic and mapping methods, logic gates, arithmetic logic units, multiplexers/ demultiplexers, analysis and synthesis of combinatorial logic circuits, ROM memories, synchronous and asynchronous state machines, hazards and races in pulse mode and fundamental mode state machines. Design and fabrication projects utilizing digital integrated circuits. Laboratory consists of "proof of concept" experiments using digital components. Prerequisite: Grade C or better in CSE 1311.

Point Values for Activities / Percentages for Grades
MidtermExam / 25% / 90% --100% / A
Quiz (4) / 10% / 80% -- 89% / B
Homework / 10% / 70% -- 79% / C
Labs / 30% / 60% -- 69% / D
Final Exam / 25% / 0% -- 59% / F

Textbooks

Fundamentals of Logic Design, 6th Edition by Charles H Roth, Jr. and Larry L. Kinney, Cengage Learning, 2010

PIC12F609 Data Sheet. This document may be downloaded from

Software Requirements

MS Word or equivalent will be necessary for Lab Reports. MultiSIM will be required to perform simulations of the digital circuits you will design, build, and demonstrate during Lab.
MPLAB IDE, which may be downloaded BY CLICKING HERE. You can also go to and search for MPLab IDE. The current version is 8.86(June 7, 2012). Please note: MPLAB X is NOT supported at this time.

EE2341 Class Schedule

week / Topic / Text CH / Assignment / Lab
1 / 23Aug / Number Systems / 1
2 / 28-30Aug / Boolean Algebra / 3
3 / 4-6 Sep / Minterm/Maxterm Expansions / 3 / HW 1
5 / 11-13Sep / Karnaugh Maps / 5 / Quiz 1 / Lab 1
6 / 18-20Sep / NAND-NOR/ Combinational Circuit / 7 / HW 2 / Lab 2
7 / 25-27Sep / Multiplexors and Decoders / 9 / Quiz2 / Lab 3
8 / 2-4Oct / Latches / Flip Flops / 11 / HW 3 / Lab 4
9 / 9-11Oct / Counters / 12 / HW 4 / Lab 5
10 / 16-19Oct / Clocked Sequential Circuits / 13 / Midterm: Oct 16 / No Lab
11 / 23-26Oct / State Tables / 14 / HW5 / Lab 6
12 / 30Oct-1Nov / Sequential Circuit Design / 16 / HW 6 / Lab 7
13 / 6-8Nov / Intro to PIC12F: Function and Architecture / Quiz3 / Lab 8
14 / 13-15Nov / Memory Arrangement and Banking / PIC12 / HW7 / Lab 9
15 / 20-22Nov / GPIOLoops and delayConditional Branching / PIC12 / Thanksgiving Holidays / No Lab
16 / 27-29Nov / Subroutines / Timers / PIC12 / Quiz4 / Lab Final Project
17 / 4-6 Dec / Finals Week - ReviewClass
18 / 11-13Dec / Final Exam

Lab Assignments

There will be 9 Lab Assignments distributed over the semester, with a Design Project at the end. Students will work individually. 9 Lab assignments will be 20% of your grade. Final Lab project will be another 10% of total 30% lab grades.

Prelabs must be completed prior to coming to lab. Students will be turned away from the Lab if the Prelab is not complete.

Lab circuits must be built during Lab on an empty breadboard. They may not be built prior to the Lab period. At specified places in the lab you will be asked to demonstrate your functioning circuit to the GTA.You nedd to have your own Breadboard and wires and tools.

Formal Lab Reports should follow the same approach used in the lab, which is a Hypothesis/Test sequence. In Prelab you will be asked to design a circuit to perform a specific function. During the lab time you built the circuit and collected test data to show how the circuit performed. The report, then, should be constructed as follows:

1.Introduction

2.Problem Statement

3.Explanation of the derived solution

4.Schematics developed that demonstrate the solution

5.Tests used to prove the solution worked. One of the tests should be a MultiSim simulation of your work. Include in your report a copy of the MultiSim schematic.

6.A schematic drawing of the solution you built in lab.

7.Tables showing the data acquired

8.Observations made while performing the-lab

9.An explanation of your results

10.Summary

11.Learning Statement

A Formal Lab Report should enable someone else to duplicate your work and obtain the same results without reference to any other documents. This does not mean that you should append data sheets to your report but that the schematics and parts layout should be clear and accurate.

Submit the files containing the circuit simulation, a schematic, and data which explain the lab results you obtained.

Graphics must be created using a graphics program. Acceptable programs are MultiSim, Visio, PowerPoint, or similar graphics programs. Graphics in your lab reports may not be hand-drawn.

Lab Reports are due as hardcopy and by email before lab time one week after the lab was performed. 10% per day will be deducted from the final lab grade for each 24 hours or portion thereof that a lab is late. Labs are to be submitted to BOTH the Instructor and the Lab GTA. Please use proper email subject for the lab reports.

The lowest lab grade will be dropped.

We recommend that you purchase (if you do not own them already) the following tools and supplies: Needle-nosed pliers, wire cutters (also called diagonal cutters), wire strippers, a breadboard (you should already have one, but if not, you can purchase one from Frys ) and wire (also available from Frys). Each student must possess a breadboard with the student’s name conspicuously written on the breadboard.

Homework Submissions

Homework is assigned on the Class Schedule. Homework is due at the beginning of the class. Once the lecture begins, homework is late. Late homework assignments will not be accepted.

All lab reports and homework should have a cover page showing your name, class section and UTA 1000 Number.

Exams

The two major examinations and quizzes will be old-fashioned paper, and pencil exercises. There will be 4 quizzes, you can expect to have a quiz at the assigned week, but I will not let you know the exact date.

ABET Participation: Criterion 3. Student Outcomes

The program must have documented student outcomes that prepare graduates to attain the program educational objectives. Student outcomes are outcomes (a) through (k) plus any additional outcomes that may be articulated by the program.
(a) an ability to apply knowledge of mathematics, science, and engineering
(b) an ability to design and conduct experiments, as well as to analyze and interpret data
(c) an ability to design a system, component, or process to meet desired needs within realistic constraints such as economic, environmental, social, political, ethical, health and safety, manufacturability, and sustainability
(d) an ability to function on multidisciplinary teams
(e) an ability to identify, formulate, and solve engineering problems
(f) an understanding of professional and ethical responsibility
(g) an ability to communicate effectively
(h) the broad education necessary to understand the impact of engineering solutions in a global, economic, environmental, and societal context
(i) a recognition of the need for, and an ability to engage in life-long learning
(j) a knowledge of contemporary issues
(k) an ability to use the techniques, skills, and modern engineering tools necessary for engineering practice.

In EE 2341 we focus more specifically on criteria (c), and (e). Criterion (c) will be demonstrated in numerous labs, and culminate in the final Project, for which you are asked to design a complete solution to a design problem. Criterion (e) will surface during many of the labs. We will assign problems for you to solve rather than handing you predefined circuits to build. Your task will be to design a circuit that solves the problem, simulate the solution, and then build and demonstrate the circuit during the Lab period.

Americans with Disabilities Act

The University of Texas at Arlington is on record as being committed to both the spirit and letter of federal equal opportunity legislation; reference Public Law 93112 ¾ The Rehabilitation Act of 1973 as amended. With the passage of new federal legislation entitled Americans with Disabilities Act ¾ (ADA), pursuant to section 504 of The Rehabilitation Act, there is renewed focus on providing this population with the same opportunities enjoyed by all citizens.

As a faculty member, I am required by law to provide "reasonable accommodation" to students with disabilities, so as not to discriminate on the basis of that disability. Student responsibility primarily rests with informing faculty at the beginning of the semester and in providing authorized documentation through designated administrative channels.

E-Culture Policy:

The University of Texas at Arlington has adopted the University “MavMail” address asthe sole official means of communication with students. MavMail is used to remind students ofimportant deadlines, advertise events and activities, and permit the University to conductofficial ransactions exclusively by electronic means. For example, important informationconcerning registration, financial aid, payment of bills, and graduation are now sent to studentsthrough the MavMail system. All students are assigned a MavMail account. Students areresponsible for checking their MavMail regularly. Information about activating and usingMavMail is available at There is no additional charge to studentsfor using this account, and it remains active even after they graduate from UT Arlington.To obtain your NetID or for logon assistance, visit you are unable to resolve your issue from the Self-Service website, contact the Helpdesk .

The instructor/GTAs will send important course-related information to your MavMail emailaddress ONLY. Your email to the instructor/GTA should also come from MavMail emailaccount. Your email message sent from non-UT-Arlington accounts may never reach the

instructor/GTA. You will be responsible for any misplaced or misdirected email that is sentfrom non-UT-Arlington email address.

Academic Dishonesty

It is the philosophy of The University of Texas at Arlington that academic dishonesty is a completely unacceptable mode of conduct and will not be tolerated in any form. All persons involved in academic dishonesty will be disciplined in accordance with University regulations and procedures. Discipline may include suspension or expulsion from the University.

"Scholastic dishonesty includes but is not limited to cheating, plagiarism, collusion, the submission for credit of any work or materials that are attributable in whole or in part to another person, taking an examination for another person, any act designed to give unfair advantage to a student or the attempt to commit such acts." (Regents' Rules and Regulations, Part One, Chapter VI, Section 3, Subsection 3.2, Subdivision 3.22).

Final Review Week:

A period of five class days prior to the first day of final examinations will be designated

as FINAL REVIEW WEEK. The purpose of this week is to allow sufficient time for students to

prepare for final exams. During this week, there will be no schedule or required activities such

as field trips, seminars, or performances; and no themes, research problems or exercises of

similar scope that have a completion date during or following this week will be assigned unless

specified in the class syllabus. During Final Review Week, no exams constituting 10% or more

of the final grade will be given, except make-up tests and laboratory examinations.

Equal Opportunity Policy Statement

It is the policy of The University of Texas at Arlington that to the extent provided by these applicable laws no person shall, on the basis of race, color, national origin, religion, age, sex, disabilities, or veteran status, be denied employment or admission, be excluded from participation in, be denied the benefits of, or subject to discrimination under, any program or activity which it sponsors or conducts. It is also UT Arlington's policy to maintain an environment free from discrimination on the basis of sexual orientation.

UT Arlington Honor Code

I pledge, on my honor, to uphold UT Arlington’s tradition of academic integrity, a tradition that values hard work and honest effort in the pursuit of academic excellence. I promise that I will submit only work that I personally create or contribute to group collaborations, and I will appropriately reference any work from other sources. I will follow the highest standards of integrity and uphold the spirit of the Honor Code.

Please read all the instructions above, and acknowledge your complete understanding by printing your name, sign and date. Return this ( last page Only) to me after signed.

Name: ______

Signature: ______Date: MM/DD/YYYY

1