ECE526 Digital Design with Verilog and System Verilog

Course Syllabus

ECE526 – Digital Design with Verilog and System Verilog

Department of Electrical & Computer Engineering

1. Course Number and Name:ECE526 – Digital Design with Verilog and System Verilog

2. Credit Units/Contact Hours:3/3

3. Course Coordinator:Ronald W. Mehler

4. Text, References & Software

Recommended Text:

Palnitkar, Samir, Verilog HDL, Second Edition, Prentice Hall, Upper Saddle River, NJ, ISBN 0-13-044911-3

Software

Cadence NC-Verilog simulator

5. Specific Course Information

a. Course Description

This course covers the use of Verilog and SystemVerilog Languages (IEEE Std. 1800) for the design and development of digital integrated circuits, including mask-programmed integrated circuits (ASICs) and field programmable devices (FPGAs). Hierarchical top down vs. bottom up design, synthesizable vs. non-synthesizable code, design scalability and reuse, verification, hardware modeling, simulation system tasks, compiler directives and subroutines are all covered and illustrated with design examples.

b. Prerequisite by Topic

ECE 320/L. Corequisite: ECE 526L. Students need a thorough understanding of Boolean algebra, combinational and sequential digital circuits and number systems (binary, hexadecimal).

c. Elective Course

6. Specific Goals for the Course

a. Specific Outcomes of Instructions – After completing this course the students should be able to:

1. The ability to code and simulate any digital function in Verilog HDL.

2. Know the difference between synthesizable and non-synthesizable code.

3. Understand library modeling, behavioral code and the differences between then.

4. Understand the differences between simulator algorithms.

5. Learn good coding techniques per current industrial practices.

6. Understand logic verification using Verilog simulation.

b. Relationship to Student Outcomes

This supports the achievement of the following student outcomes:

a.An ability to apply knowledge of mathematics, science, and engineering to the analysis of electrical and computer engineering problems.

b.An ability to design and conduct scientific and engineering experiments, as well as to analyze and interpret data.

c. An ability to design systems which include hardware and/or software components within realistic constraints such as cost, manufacturability, safety and environmental concerns.

e.An ability to identify, formulate, and solve electrical and computer engineering problems.

g.An ability to communicate effectively through written reports and oral presentations.

k.An ability to use modern engineering techniques for analysis and design.

m.An ability to analyze and design complex devices and/or systems containing hardware and/or software components.

7. Topics Covered/Course Outline

1. The necessity of designing at ever-increasing levels of abstraction.

2. The limitations of manual design optimization techniques.

3. Simulator algorithms.

4. Verilog primitive operators and structural Verilog.

5. Behavioral Verilog.

6. Design verification.

7. Synchronization and synchronous design.

8. Top-down and bottom-up design methodologies.

9. Library modeling.

Prepared by:

Ronald W. Mehler, Professor of Electrical and Computer Engineering, October 2012

Ali Amini, Professor of Electrical and Computer Engineering, March 2013