DC Power-Bus Design Using FDTD Modeling with Dispersive Media and Surface Mount Technology

Efficientmodelingofdiscontinuities and dispersive media in printed transmission lines
- Araneo, R.Wang, C.Gu, X.Drewniak, J.Celozzi, S.
Dept. of Electr. Eng., Rome Univ., Italy
This paper appears in:Magnetics, IEEE Transactions on
On page(s): 765 - 768
2-5 July 2001
Evian, France
March 2002
Volume: 38 Issue: 2 Part: 1
ISSN: 0018-9464
References Cited: 14
CODEN: IEMGAQ
INSPEC Accession Number: 7265055

Abstract:
The finite-difference time-domain method is applied to the analysis of transmission lines on printed circuit boards. The lossy, dispersive behavior of the dielectric substrate is accurately accounted for by means of several algorithms whose accuracy is discussed and compared. Numerical results are validated by comparisons with measurements and an equivalent circuit of slot in the ground plane is proposed.

FDTD modeling incorporating a two-port network for I/O line EMI filtering design
- Xiaoning YeDrewniak, J.L.
Dept. of Electr. & Comput. Eng., MissouriUniv., Rolla, MO, USA
This paper appears in:Electromagnetic Compatibility, IEEE Transactions on
On page(s): 175 - 181
Feb. 2002
Volume: 44 Issue: 1
ISSN: 0018-9375
References Cited: 25
CODEN: IEMCAE
INSPEC Accession Number: 7223179

Abstract:
Electromagnetic interference (EMI) filters are often utilized on I/O lines to reduce high-frequency noise from being conducted off the printed circuit board (PCB) and causing EMI problems. The filtering performance is often compromised at high frequencies due to parasitics associated with the filter itself, or the PCB layout and interconnects. Finite difference time domain (FDTD) modeling can be used to quantify the effect of PCB layout and interconnects, as well as filter type, on the EMI performance of I/O line filtering. FDTD modeling of a T-type and /spl pi/-type filter consisting of surface-mount ferrites and capacitors is considered herein. The FDTD method is applied to model PCB layout and interconnect features, as well as the lumped element components, including the nonlinear characteristics of ferrite surface-mount parts. The EMI filters with ferrites; are included in the modeling by incorporating the time-domain Y-parameters of the two-port network into the FDTD time-marching equations. Good agreement between the FDTD modeling and S-parameter measurements supports the new FDTD algorithm for incorporating two-port networks.

Quantifying SMT decoupling capacitor placement in dc power-bus design for multilayer PCBs
- Jun FanDrewniak, J.L.Knighten, J.L.Smith, N.W.Orlandi, A.Van Doren, T.P.Hubing, T.H.DuBroff, R.E.
Electromagn. Compatibility Lab., MissouriUniv., Rolla, MO, USA
This paper appears in:Electromagnetic Compatibility, IEEE Transactions on
On page(s): 588 - 599
Nov. 2001
Volume: 43 Issue: 4
ISSN: 0018-9375
References Cited: 35
CODEN: IEMCAE
INSPEC Accession Number: 7150266

Abstract:
Noise on a dc power-bus that results from device switching, as well as other potential mechanisms, is a primary source of many signal integrity (SI) and electromagnetic interference (EMI) problems. Surface mount technology (SMT) decoupling capacitors are commonly used to mitigate this power-bus noise. A critical design issue associated with this common practice in high-speed digital designs is placement of the capacitors with respect to the integrated circuits (ICs). Local decoupling, namely, placing SMT capacitors in proximity to ICs, is investigated in this study. Multilayer PCB designs that employ entire layers or area fills for power and ground in a parallel plate structure are considered. The results demonstrate that local decoupling can provide high-frequency benefits for certain PCB geometries through mutual inductive coupling between closely spaced vias. The associated magnetic flux linkage is between the power and ground layers. Numerical modeling using an integral equation formulation with circuit extraction is used to quantify the local decoupling phenomenon. Local decoupling can effectively reduce high-frequency power-bus noise, though placing capacitors adjacent to ICs may limit routing flexibility, and tradeoffs need to be made based on design requirements. Design curves are generated as a function of power-bus layer thickness and SMT capacitor/IC spacing using the modeling approach to quantify the power-bus noise reduction for decoupling capacitors located adjacent to devices. Measurement data is provided to corroborate the modeling approach.

DC power-bus design using FDTD modeling with dispersive media and surface mount technology components
- Xiaoning YeKoledintseva, M.Y.Min Li ,Drewniak, J.L.
Electromagn. Compatibility Lab., MissouriUniv., Rolla, MO, USA
This paper appears in:Electromagnetic Compatibility, IEEE Transactions on
On page(s): 579 - 587
Nov. 2001
Volume: 43 Issue: 4
ISSN: 0018-9375
References Cited: 31
CODEN: IEMCAE
INSPEC Accession Number: 7150265

Abstract:
DC power-bus modeling in high-speed digital design using the finite-difference time-domain (FDTD) method is demonstrated herein. The dispersive character of the dielectric layers used in printed circuit board substrates is taken into account in this study. In particular, FR-4 is considered. The complex permittivity of the dielectric is approximated by a Debye model. A wide-band frequency response (100 MHz-5 GHz) is obtained through a single FDTD simulation. Good agreement is achieved between the modeled and measured results for a typical dc power-bus structure with multiple surface mount technology (SMT) decoupling capacitors placed on the printed circuit board (PCB). The FDTD method is then applied to investigate some general approaches of power-bus noise decoupling.

DC power-bus modeling and design with a mixed-potential integral-equation formulation and circuit extraction
- Jun FanDrewniak, J.L.Hao ShiKnighten, J.L.
Electromagn. Compatibility Lab., MissouriUniv., Rolla, MO, USA
This paper appears in:Electromagnetic Compatibility, IEEE Transactions on
On page(s): 426 - 436
Nov. 2001
Volume: 43 Issue: 4
ISSN: 0018-9375
References Cited: 22
CODEN: IEMCAE
INSPEC Accession Number: 7150249

Abstract:
The application of a circuit extraction approach based on a mixed-potential integral equation formulation (CEMPIE) for DC power-bus modeling in high-speed digital designs is detailed. Agreement with measurements demonstrates the effectiveness of the approach. Dielectric losses are included into the calculation of the Green's functions, and thus, incorporated into the rigorous first principles formulation. A SPICE model is then extracted from the discretized integral equation. A quasistatic approximation is used for the Green's functions to keep the extracted circuit elements frequency independent. Previous work has established a necessary meshing criterion in order to ensure accuracy for a given substrate thickness and dielectric constant to a desired frequency. Several power-bus design issues, such as surface mount decoupling and power-plane segmentation, were investigated using the modeling approach. The results and discussions illustrate the application of the method to DC power-bus design for printed circuit and multi-chip module substrates.

EMI mitigation with multilayer power-bus stacks and via stitching of reference planes
- Xiaoning YeHockanson, D.A.Min LiYong RenWei CuiDrewniak, J.L.DuBroff, R.E.
Dept. of Electr. & Comput. Eng., MissouriUniv., Rolla, MO, USA
This paper appears in:Electromagnetic Compatibility, IEEE Transactions on
On page(s): 538 - 548
Nov. 2001
Volume: 43 Issue: 4
ISSN: 0018-9375
References Cited: 26
CODEN: IEMCAE
INSPEC Accession Number: 7150260

Abstract:
General methods for reducing printed circuit board (PCB) emissions over a broad band of high frequencies are necessary to meet EMI requirements, as processors become faster and more powerful. One mechanism by which EMI can be coupled off a PCB or multichip module (MCM) structure is from high-frequency fringing electric fields on the DC power and reference planes at the substrate periphery. An approach for EMI mitigation by stitching multiple ground planes together along the periphery of multilayer PCB power-bus stacks with closely spaced vias is reported and quantified in this paper. Power-bus noise induced EMI and coupling from the board edges is the major concern herein. The EMI at 3 m for different via stitch spacing and layer thickness is modeled with the finite-difference time domain (FDTD) method. Design curves and an empirical equation are extracted from a parametric study to summarize the variation of the radiated EMI as a function of layer thickness and stitch spacing.

An EMI estimate for shielding-enclosure evaluation
- Min LiDrewniak, J.L.Radu, S.Nuebel, J.Hubing, T.H.DuBroff, R.E.van Doren, T.P.
Missouri Univ., Rolla, MO, USA
This paper appears in:Electromagnetic Compatibility, IEEE Transactions on
On page(s): 295 - 304
Aug. 2001
Volume: 43 Issue: 3
ISSN: 0018-9375
References Cited: 18
CODEN: IEMCAE
INSPEC Accession Number: 7026475

Abstract:
A relatively simple, closed-form expression has been developed to estimate the EMI from shielding enclosures due to coupling from interior sources through slots and apertures at the enclosure cavity modes. A power-balance method, Bethe's (1944) small-hole theory, and empirically developed formulas for the relation between radiation, and slot length and number of slots, were employed to estimate an upper bound on the radiated EMI from shielding enclosures. Comparisons between measurements and estimated field strengths suitably agree within engineering accuracy.

EMI considerations in selecting heat-sink-thermal-gasket materials
- Yu HuangButler, J.E.de Sorgo, M.DuBroff, R.E.Hubing, T.H.Drewniak, J.L.van Doren, T.P.
Missouri Univ., Rolla, MO, USA
This paper appears in:Electromagnetic Compatibility, IEEE Transactions on
On page(s): 254 - 260
Aug. 2001
Volume: 43 Issue: 3
ISSN: 0018-9375
References Cited: 5
CODEN: IEMCAE
INSPEC Accession Number: 7026471

Abstract:
Specific design criteria are proposed to mitigate radiated emissions from a resonant enclosure excited by a heat sink acting as a microstrip patch antenna source. In this particular application, the EMI mechanism is assumed to be due to coupling from the dominant TM/sub 010//sup x/ mode to one or more resonant modes associated with the enclosure dimensions. The enclosure is then presumed to radiate, at the enclosure resonance frequencies, through one or more apertures, slots, or seams. The EMI-reduction strategy consists of shifting the resonant frequency of the dominant-patch antenna mode by dielectrically loading the patch antenna with

thermal-gasket material having a specified electric permittivity. Specific formulas and graphs are presented showing how to select the electric permittivity of the thermal-gasket material in order to obtain a given frequency shift. A comparison of experimental measurements with the predictions of the design criteria indicates that frequency shifts of up to approximately three times the bandwidth of the patch resonance can be predicted with reasonable accuracy. In at least two different commercial products that we are aware of, changing the electrically insulating heat sink gasket materials has solved specific radiated EMI problems.

Modeling DC power-bus structures with vertical discontinuities using a circuit extraction approach based on a mixed-potential integral equation
- Jun FanHao ShiOrlandi, A.Knighten, J.L.Drewniak, J.L.
NCR Corp., San Diego, CA, USA
This paper appears in:Advanced Packaging, IEEE Transactions on [see also Components, Packaging and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on]
On page(s): 143 - 157
May 2001
Volume: 24 Issue: 2
ISSN: 1521-3323
References Cited: 43
CODEN: ITAPFZ
INSPEC Accession Number: 6960572

Abstract:
The DC power-bus is a critical aspect in high-speed digital circuit designs. A circuit extraction approach based on a mixed-potential integral equation is presented herein to model arbitrary multilayer power-bus structures with vertical discontinuities that include decoupling capacitor interconnects. Green's functions in a stratified medium are used and the problem is formulated using a mixed-potential integral equation approach. The final matrix equation is not solved, rather, an equivalent circuit model is extracted from the first-principles formulation. Agreement between modeling and measurements is good, and the utility of the approach is demonstrated for DC power-bus design.

FDTD and experimental investigation of EMI from stacked-card PCB configurations
- Hockanson, D.M.Xiaoning YeDrewniak, J.L.Hubing, T.H.Van Doren, T.P.Dubroff, R.E.
Missouri Univ., Rolla, MO, USA
This paper appears in:Electromagnetic Compatibility, IEEE Transactions on
On page(s): 1 - 10
Feb. 2001
Volume: 43 Issue: 1
ISSN: 0018-9375
References Cited: 15
CODEN: IEMCAE
INSPEC Accession Number: 6908048

Abstract:
Stacked-card and modules-on-backplane printed circuit-board geometries are advantageous for conserving real-estate in many designs. Unfortunately, at high frequencies, electromagnetic magnetic interference (EMI) resulting from the nonnegligible impedance of the signal return at the connector may occur. This effective EMI coupling path results in the daughtercard being driven against the motherboard and attached cables, resulting in common-mode radiation. The connector geometry can be modified to minimize the EMI coupling path when high frequencies are routed between the motherboard and daughtercard. Current speeds and printed circuit board (PCB) sizes result in geometries that are of significant dimensions in terms of a wavelength at the upper frequency end of the signal spectrum. The PCB geometries are then of sufficient electrical extent to be effective EMI antennas. The resonant lengths of the EMI antennas may, however, be quite removed from the typical half-wavelength dipole resonances. The finite difference time-domain method can be used to numerically analyze the printed circuit board geometries, determine antenna resonances, and investigate EMI coupling paths. EMI resulting from the stacked-card configuration has been investigated experimentally and numerically to ascertain the EMI coupling path at the bus connector, and EMI antennas.

Incorporating two-port networks with S-parameters into FDTD
- Ye, X.Drewniak, J.L.
Dept. of Electr. & Comput. Eng., MissouriUniv., Rolla, MO, USA
This paper appears in:Microwave and Wireless Components Letters, IEEE
On page(s): 77 - 79
Feb. 2001
Volume: 11 Issue: 2
ISSN: 1531-1309
References Cited: 12
CODEN: IMWCBJ
INSPEC Accession Number: 6909423

Abstract:
A modeling approach for incorporating a two-port network with S-parameters in the finite-difference time-domain (FDTD) method is reported. The proposed method utilizes the time-domain Y-parameters to describe the network characteristics, and incorporates the Y-parameters into the FDTD algorithm. The generalized pencil-of-function technique is applied to improve the memory efficiency of this algorithm by generating a complex exponential series for the Y-parameters and using recursive convolution in the FDTD updating equations. A modeling example is given, which shows that this approach is effective and accurate. This modeling technique can be extended for incorporating any number of N-port networks in the FDTD modeling.

EMI reduction from airflow aperture arrays using dual-perforated screens and loss
- Min LiNuebel, J.Drewniak, J.L.Hubing, T.H.DuBroff, R.E.Van Doren, T.P.
Missouri Univ., Rolla, MO, USA
This paper appears in:Electromagnetic Compatibility, IEEE Transactions on
On page(s): 135 - 141
May 2000
Volume: 42 Issue: 2
ISSN: 0018-9375
References Cited: 19
CODEN: IEMCAE
INSPEC Accession Number: 6674424

Abstract:
Airflow perforations in shielding enclosures can act as apertures facilitating the coupling from internal sources to external electromagnetic interference (EMI). This EMI radiation for single- and dual-screen configurations was studied herein experimentally and with finite-difference time domain (FDTD) modeling. A general EMI reduction of more than 20 dB was achieved for dual-perforated screens spaced 1 cm apart when compared to EMI for a single perforated screen. However, in the dual-screen case, the space between the screens can act as a thin cavity, which, in turn, can lead to significant radiation at distinct angles. Damping the resonances by loading the space between the screens with lossy material mitigates this problem and achieves more than 20-dB reduction over a single screen.

Behavioral IGBT modeling for predicting high frequency effects in motor drives
- Tichenor, J.L.Sudhoff, S.D.Drewniak, J.L.
Dept. of Electr. Eng., MissouriUniv., Rolla, MO, USA
This paper appears in:Power Electronics, IEEE Transactions on
On page(s): 354 - 360
March 2000
Volume: 15 Issue: 2
ISSN: 0885-8993
References Cited: 14
CODEN: ITPEE8
INSPEC Accession Number: 6555360

Abstract:
A first-order behavioral IGBT/gate drive model is proposed together with a procedure for deriving all model parameters. Despite the simplicity of the proposed model, comparison of model predictions with hardware measurements demonstrate the model to be accurate in predicting turn-on and turn-off transients.