Mega48 Toolbox

Store and recall

The subroutine store takes the byte in register s0 and stores it at SRAM address $01XX, where XX is the byte stored in register s7.

store:movi zh, $01;set memory pointer

movZl,s7;use s7 to set memory base address

stZ,s0;store byte in s0;

movi zh, $00;reset memory pointer

ret

The subroutine recall copies the byte at SRAM address $01XX into register s0, where XX is the byte stored in register s7.

recall:movi zh, $01;set memory pointer

movZl,s7;use s7 to set memory base address

lds0,Z;place byte in s0

movi zh, $00;reset memory pointer

ret

Both subroutines should be placed at the end of the main program, after the start label. Any attempt to shoehorn them into the header file will upset the operation of the readtable subroutine which expects the table to start at address $004A in program memory.

16x4bit RAM

This example shows how the store and recall subroutines can be used to mimic the operation of the simple RAM shown opposite. /

When the control line is high, the output bus holds the word stored at the location specified by the word on the address bus. Holding the control line low stores the word on the input bus at the location specified by the address bus.

Microcontroller circuit

The standard header file only gives the Mega48 six input pins. The RAM shown above requires nine input pins, so the input port has to be expanded with analogue switches, as shown below.

Two pins of the output port are used to select the RAM bus which is connected to the microcontroller input port. Obviously, tristates could be used instead of analogue switches.

Program

start:movis1,$0F;set nibble mask

movis2,$80;set data control

movis3,$40;set address control

movis4,$10;set control mask

rcall default

back0:eors0,s3;

outQ,s0;enable address port

ins7,I

ands7,s1;read RAM address

eors0,s3

outQ,s0;disable address port

in s5,I

ands5,s4;read control bit

jzford0

rcallrecall;fetch word from RAM

outQ,s0;output word from RAM

jp back0

ford0:eors0,s2

outQ,s0;enable data port

ins0,I

ands0,s1;read new RAM word

outQ,s0;disable data port, output new word

rcallstore;place word in RAM

jpback0

default:movis5,$0F;set loop counter

movis0,$0F;set default word

movis7,$00;initialise RAM address

back1:rcallstore

incs7

decs5

jnzback1;fill RAM with default 0F

outQ,s0;output default word

ret

MWB on 30/09/2018 at 11:16page 116by4bitRAM