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Background Statement for SEMI Draft Document 5330
NEW STANDARD: TEST METHOD FOR IN-LINE MEASUREMENT OF CRACKS IN PV SILICON WAFERS BY DARK FIELD INFRARED IMAGING
Notice: This background statement is not part of the balloted item. It is provided solely to assist the recipient in reaching an informed decision based on the rationale of the activity that preceded the creation of this Document.
Notice: Recipients of this Document are invited to submit, with their comments, notification of any relevant patented technology or copyrighted items of which they are aware and to provide supporting documentation. In this context, “patented technology” is defined as technology for which a patent has issued or has been applied for. In the latter case, only publicly available information on the contents of the patent application is to be provided.
Cracks in Si wafers for PV applications may severely impact the yield production lines for solar cells as well as their performance. Therefore the number of cracks in a wafer and their size are critical parameters in wafer specifications. For exchanging and assessing of corresponding data between suppliers of wafers and their customers it is necessary to refer to commonly agreed test methods for cracks in Si wafers. Therefore this document proposes such a measurement method.
The corresponding SNARF was approved by the PV Materials Committee in its meeting in Dresden on October 11, 2011. The draft document was approved for yellow letter ballot in cycle 3 of 2012 by the PV Materials Committee in its meeting in Berlin on March 28, 2012, to be adjudicated in its meeting in conjunction with Intersolar Europe in Munich in June 2012.
Check under Calendar of Events for the latest update.
Review and Adjudication Information
Task Force Review / Committee AdjudicationGroup: / PV Silicon Materials TF / Europe PV Materials Committee
Date: / Wednesday, June 13, 2012 / Wednesday, June 13, 2012
Time & Timezone: / 11:00 to 13:00 CET / 16:00 to 18:00 CET
Location: / International Congress Centre Munich (ICM) / International Congress Centre Munich (ICM)
City, State/Country: / Munich, Germany / Munich, Germany
Leader(s): / Peter Wagner / Peter Wagner
Hubert Aulich (PV Crystalox)
Standards Staff: / Kevin Nguyen (SEMI NA)
408.943.7997
/ Kevin Nguyen (SEMI NA)
408.943.7997
This meeting’s details are subject to change, and additional review sessions may be scheduled if necessary. Contact the task force leaders or Standards staff for confirmation.
SEMI Draft Document 5330
NEW STANDARD: TEST METHOD FOR IN-LINE MEASUREMENT OF CRACKS IN PV SILICON WAFERS BY DARK FIELD INFRARED IMAGING
1 Purpose
1.1 Silicon (Si) wafers for PV applications cut from a Si ingot or Si brick contain a variety of micro- and macroscopic crystallographic defects and flaws that may impact the efficiency of a solar cells or the yield of a manufacturing line.
1.2 Theses defects can be categorized by their origin, either as grown-in defects that are generated during the solidification of the Si ingot or as process induced defects that are generated by abrasive processes during manufacturing of the wafers.
1.3 The grown-in defects consist of point defects (impurities, vacancies, self-interstitials and their complexes), dislocations, grain boundaries, and precipitates/inclusions.
1.4 The process induced defects consist of chips/indents (surface and edge) and cracks (not to mention the surface itself).
1.5 Inclusions, chips and cracks are detrimental for solar cell processing as they may enhance stress in the wafer bulk and the region surrounding them and trigger the breakage of a wafer.
1.6 Characteristic parameters of these defects are part of wafer specifications (SEMI PV22), such as number per wafer, maximum length or size. Standardized test methods for measuring them are required to avoid disagreement between business partners regarding wafer quality and specification.
1.7 This standard defines a test method for reproducibly detecting and characterizing cracks and distinguishing them from other defects.
2 Scope
2.1 This test method characterizes cracks in single or multi-crystalline Si wafers.
2.2 It covers an in-line, non-contacting and non-destructive method that determines the number of cracks per wafer and crack length of clean, dry as-cut Si wafers that are supported by two belts that move the test specimen through the measurement equipment.
2.3 This test method covers square and pseudo-square PV Si wafers, with a nominal edge length ≥ 125 mm and a thickness ≥ 100 µm.
2.4 Because this test method is intended for in-line high throughput measurements it is mandatory to operate the measurement system under a tight SPC (e.g. ISO 11462) for obtaining reliable, repeatable and reproducible measurement data.
NOTICE:SEMI Standards and Safety Guidelines do not purport to address all safety issues associated with their use. It is the responsibility of the users of the Documents to establish appropriate safety and health practices, and determine the applicability of regulatory or other limitations prior to use.
3 Limitations
3.1 Wafers with a resistivity ≤ approximately 0.5 ·cm cannot be measured due to excessive absorption of infrared light. This resistivity limit depends on the thickness and the surface roughness of the wafer as well as on the light power and camera sensitivity.
3.2 The minimum detectable dimensions of cracks or other defects depend on the resolution of the detector used.
3.3 Cracks scattering light equivalent to the background may not be detected or distinguished from grain boundaries.
3.4 Cracks are identified and classified in this test method based on a number of features they display in a dark field image of a wafer. Therefore results of measurement obtained with different equipment may differ depending on crack-characterization criteria used.
3.5 The temperature of wafers must be 23 ± 5 °C when measured.
4 Referenced Standards and Documents
4.1 SEMI Standards and Safety Guidelines
SEMI E89—Guide for Measurement System Analysis (MSA)
SEMI M59—Terminology for Silicon Technology
SEMI MF1569 –– Guide for Generation of Consensus Reference Materials for Semiconductor Technology
SEMI PV22 –– Specification for Silicon Wafers for Use as Photovoltaic Solar Cells
4.2 ISO Standards[1]
ISO 11462-1—Guidelines for implementation of statistical process control (SPC) – Part 1: Elements of SPC
ISO 11462-2 –– Guidelines for implementation of statistical process control (SPC) – Part 2: Catalogue of tools and techniques
NOTICE: Unless otherwise indicated, all documents cited shall be the latest published versions.
5 Terminology
(Refer to the SEMI Standards Compilation of Terms (COTs) for a list of the most current Abbreviations, Acronyms, Definitions, and Symbols.)
5.1 Definitions
5.1.1 crack — cleavage or fracture that extends to the surface of a wafer (SEMI M59).
5.1.2 chip — region where material has been unintentionally removed from the surface or edge of the wafer (SEMI M59).
6 Summary of Test Method
6.1 The wafer resting on two belts is moved by the belts past an infrared source and a digital imaging camera.
6.2 Narrow strips of infrared light are projected either on the wafer at an angle or through the wafer edge into the wafer bulk parallel to the leading edge of a wafer it moves along the transport direction (see Figure 1).
6.3 The infrared light wavelength is selected so that light is transmitted through Si.
6.4 If applicable, angle is selected so that the directly transmitted light does not enter the line camera's aperture.
6.5 Defects in and on the Si wafer scatter light, part of which may enter the aperture of the line camera and forms a dark field image of the light strip.
6.6 Successive images of the illuminated region in the bulk of the wafer are recorded by a line array of sensors as the wafer is advanced creating a full-wafer scan.
6.7 The full wafer image is processed and evaluated by appropriate algorithms and number and length of the defects detected are reported.
7 Interferences
7.1 Contamination –– on the wafer surfaces may impact the measurement result.
8 Apparatus (see Figure 1)
8.1 Projector — projects a narrow strip of infrared lightby either one of the following two methods.
8.1.1 Method A: The light strip is projected at an angle of incidence (angle between line of sight of the projector and the surface normal) on the wafer surface and across the entire width of the wafer perpendicular to the direction of belt transport.
8.1.2 Method B: Two light strips are projected into the wafer bulk through opposing wafer edges perpendicular to the direction of belt transport.
8.2 Sensor ––digital imaging camera with a line array of sensors (≥ 4096 pixels) and set up with its line of sight perpendicular to the wafer surface, recording the light scattered by the defects in and on the Si wafer. The noise level (3 ) of the camera shall be ≤ 1 % of the peak signal and the dynamic range shall be ≥ 255 gray levels. For Method A the camera is mounted at the side of the wafer opposite to the projector.
8.3 Computer –– for controlling the measurement system and equipped with software for recording and processing the camera images according to § 14.
8.4 Wafer Transport–– consisting of belts, which transport the wafer continuously through the measurement apparatus and without obstructing the line of sight of the camera and the illumination. The belts shall not leave traces or residue on the wafer surface.
9 Safety Precautions
9.1 The entire equipment must be placed in a closed housing and secured with a safety lock that stops the belts and switches the tool off when the housing is opened.
9.2 The infrared light used is not visible to humans. Special provisions shall be taken to protect the eyes of operators during maintenance activities.
9.3 If required by local, national or international safety requirements, protecting goggles shall be used by operators and maintenance personnel.
10 Test Specimens
10.1 Clean, dry Si wafers with as-cut surfaces.
11 Preparation of Apparatus
11.1 The suitability of the equipment is determined by performing a statistically based MSA (Measurement System Analysis) to ascertain whether the equipment is operating within the manufacture’s stated specification, e.g. according to SEMI E89.
11.2 Use a single crystalline silicon wafer for:
11.2.1 applying a flat-field correction to the wafer image to correct the intensity fall-off of the illuminated light strip towards the edges of the wafer, and
11.2.2 adjusting the gain of the camera and the light intensity of projected the light strip so that the average gray value of the wafer image is at 60 to 70 % of the sensitivity range of the camera.
11.3 Define the SPC control limits for the measurement equipment with a set of selected wafers.
NOTE 1:As this test method is intended for a high throughput, high volume measurement the equipment cannot be calibrated for measuring each individual wafer. Therefore careful SPC has to be performed.
12 Calibration and Standardization
12.1 Calibrate the equipment by using one or more reference wafers.
12.1.1 The reference wafers contain cracks.
12.1.2 Measure the reference wafer(s) according to §§ 13 and 14.
12.2 Adjust the parameters of § 14 so that the number of cracks is within a specified bias and precision range.
NOTE 2:The number of cracks of the reference wafers is determined by mutual agreement between customer and supplier of the equipment. The reference wafers may consist of other material than silicon, provide it is transparent in the wavelength range of the light source used.
12.3 Care has to be taken when a tool is selected for establishing the length of the cracks of reference wafers. This tool shall be calibrated with traceable reference materials, its measurement principle shall correspond to the method described in this test method.
13 Procedure
13.1 Adjust the equipment and calibrate it according to the supplier's instructions.
13.2 Verify the equipment is within SPC limits.
13.3 Measure the wafer.
13.3.1 Place a wafer on the transport belts.
13.3.2 Align the wafer so that its leading edge is parallel to the projected light strip and saw marks are perpendicular to the transport direction.
13.3.3 Move the wafer through the measurement station.
13.3.4 Scan the entire length of the wafer.
13.3.5 Record the successive digital dark field images of the projected light strip during the scan.
13.3.6 Combine the successive strip images to a digital raw image RI of the entire wafer.
13.3.7 Process RI according to §14.
13.3.8 Report the number and maximum length of cracks on or in the wafer according to § 15.
13.4 Repeat with the next wafer.
14 Calculations and Image Processing
14.1 Process the wafer image according to five main steps (Figure 2):
14.1.1 Step 1: Detection of wafer edges and low pass filtering of image.
14.1.2 Step 2: Detection of potential defects.
14.1.3 Step 3: Segmentation of the defects.
14.1.4 Step 4: Identification, distinction and classification of the defects.
14.1.5 Step 5: Final decision about defect identification.
14.2 Decide which filtering or classifying steps are skipped and note this in the report.
14.3 Classify thedetected defects according to their specific characteristics as follows:
14.4 Step 1: Detection of wafer edges and low pass filtering of image.
14.4.1 Detect the wafer edges by appropriately processing the raw image RI and fit the edges with polynomials of 2nd (edges) or 3rd (chamfers of pseudo square wafers) degree.
14.4.2 Crop RI according to the found edges to obtain the cropped image CI.
14.4.3 Filter CI with a low pass filter(s) to obtain a filtered image FI. Report filter type(s) and characteristics.
14.5 Step 2: Detection of potential defects.
14.5.1 Apply additional filters, pixel intensity transformations, threshold algorithms or other appropriate image processing procedures to FIfor detecting potential defects.
14.5.2 Mark the pixels belonging to the potential crack by coloring them, e.g. red, to obtain the marked-up image MI1.
14.5.3 Report the characteristic parameters of the filters, transformations and algorithms used.
14.5.4 Continue with step 3 if required. Otherwise continue with step 4.
14.6 Step 3: Segmentation of the defects.
14.6.1 Repeat 14.5 with a different set of parameters. Mark the corresponding pixels in another color, e.g. green, to obtain the marked-up image MI2.
14.6.2 Select the parameters so that more pixels are marked green as compared to red.
14.6.3 Each set of connected marked pixels is referred to as a ‘defect’ in the following.
14.6.4 Number the potential defects detected.
14.6.5 Report the parameters used.
14.6.6 Proceed with Step 4.
14.7 Step 4: Identification, distinction and classification of the defects.
14.7.1 Process each defect in MI1 or MI2 respectively, according to specific characteristics of crack images.
14.7.2 Report the characteristics and parameters used.
14.8 Step 5: Final decision about defect identification.
14.8.1 Distinguish cracks from other defects, such as grain boundaries, inclusions or saw marks.
14.8.2 Report the number of cracks identified as well as their length.
15 Report
15.1 The report shall contain the following elements.
15.2 Date and time of test.
15.3 Identification number of measurement equipment
15.4 Equipment software revision.
15.5 Calibration and SPC status.
15.6 Lot identification, including each wafer's ID, if available.
15.7 Ambient temperature.
15.8 Wavelength and power density of IR light used for illuminating the wafer.
15.9 Angle of incidence if applicable.
15.10 The settings of the parameters used for the image processing regarding cracks. Some examples are shown in Table 1; other examples are possible.
15.11 Number of cracks and their length.
15.12 Maximum length of cracks.
Table 1Example of List of Parameters Used for Filtering the Images and for Classifying Defects for Processing (examples for values and units in parentheses)Parameter / Unit / Value
1 / (px) / (5)
2 / (µm-1) / (3)
…
5 / (%) / (10)
...
…
16 Precision and Bias
16.1 No certified reference materials currently exist for establishing the bias of measurement equipment that is described in this test method.
16.2 Provisional reference materials may be qualified by using appropriate equipment that is capable of measuring certified reference materials as well as silicon wafers (SEMI MF1569).
16.3 In the absence of interlaboratory test data to establish its reproducibility this test method should be used for materials specification and acceptance only after the parties to the test have established reproducibility and correlation.
NOTICE: Semiconductor Equipment and Materials International (SEMI) makes no warranties or representations as to the suitability of the Standards and Safety Guidelines set forth herein for any particular application. The determination of the suitability of the Standard or Safety Guideline is solely the responsibility of the user. Users are cautioned to refer to manufacturer’s instructions, product labels, product data sheets, and other relevant literature, respecting any materials or equipment mentioned herein. Standards and Safety Guidelines are subject to change without notice.
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