EE 3563 Digital Systems Design

Syllabus

Course Overview

Introduction to switching theory; design of complex combinational and sequential circuits; analysis of hazards and fault detection, location, and tolerance; and design and verification of complex circuitry using schematic entry, functional modeling, and mixed-mode simulation.

Class/laboratory schedule:

  • 2 – 75 minute lecture session/week
  • Open lab sessions throughout the semester

Prerequisite

Students are expected to have a grade C or better in EE2513 -- Logic Design.

Textbook

  • Wakerly, John F., Digital Design Principles & Practices, Prentice Hall.
  • (Reference) Roth, Charles, Fundamental of Logic Design 4th edition, Thompson
  • (Reference) Bhasker, J. A VHDL Synthesis Primer 2nd edition, Star Galaxy Publishing

Major prerequisites by topic:

  • Combinational networks design
  • Sequential network design
  • Boolean minimization
  • K-map and Quine-McCluskey methods

Course objectives:

To teach students various methodologies in designing digital circuits.

To teach students in using the state-of-art design tool in designing complex digital circuits.

To expose students with recent advances in the field of circuit design.

To develop Hardware Modeling concept and skills.

Contribution of course to meet the professional component:

This course prepares students to work professionally in the area of designing digital systems.

Relationship of course to EE program outcomes:

This course primarily contributes to Electrical Engineering program outcomes that develop student abilities to:

  • utilize general scientific principles, and computer applications for solving practical engineering problems (Outcome A.1, B2)
  • conduct experiments, and interpret and analyze data (Outcome A.2)
  • have fundamental design skills (Outcome A.3).
  • identify, formulate, and solve engineering problems (Outcome B.1)
  • utilize modern engineering tools, software, and instrumentation relevant to their field of specialty (Outcome C5)

This course secondarily contributes to Electrical Engineering program outcomes that develop student abilities to:

  • understand the impact of engineering solutions in a global and societal context (Outcome C.3)
  • understand the need for continuing professional education (Outcome C.4).

Topics covered:

  • Review of Logic Design
  • Realization of Logic Elements
  • Logic Hazards
  • MGC Software Introduction
  • Multiple-Output Circuit Minimization
  • Programmable Logic Devices
  • Design of Complex Parts and Cells
  • Design of Complex Sequential Circuits
  • State Table Minimization for Sequential Circuit Design
  • Mealy and Moore Circuits
  • Asynchronous Sequential Circuits
  • Race Problem in Asynchronous Circuits
  • Fault Detection
  • Hardware Descriptive Language

Grading Policy

150 pts / Homework
200 pts / Lab Assignments and ABET Notebook
200 pts / Midterm Exam I (around week 6)
200 pts / Midterm Exam II (around week 11)
250 pts / Final Exam - COMPREHENSIVE (TBD)

A letter grade is determined from the total numerical grades as follows: A: over 900 pts; B: over 800 pts; C: over 700 pts: D: over 600 pts; F: below 600 pts.

Code of Honor

We believe in the highest level of academic integrity. Unless otherwise required, each student is expected to complete his or her assignment individually and independently. Although study together is encouraged, the work handed in for grading by each student is expected to be his or her own. Any form of academic dishonesty will be strictly forbidden and will be punished to the maximum extent.

Contact Information

Instructor:Mr John Ortiz

Office:none

Office Hours:Flexible. Meetings will be arranged on a case by case and as needed basis

Email: (5 A’s, 4 “Oh’s”, NOT zeros)

Attendance Policy

Attendance is highly encouraged though no direct penalties will be assessed for absences. However, attendance may be an important factor in determining a grade that is on the borderline. Students are responsible for topics covered in missed classes, as well as any assignments due. Attendance is mandatory on exam days.

Late Policy

All assignments must be handed in by the due date to receive full credit. This will be at the beginning of class on the specified date. If it’s after class, it’s late. An assignment that is one week late will be accepted at a discount of 30%. That is due at the beginning of that class.

Exam Policy

All exams will be in-class, closed book and closed-note. No makeup exam will be given unless compelling reasons can be supplied and verified, and in case it is given, a makeup exam is generally somewhat more difficult than the regular scheduled exams. Missed exams will receive no grade. No additional activities will be assigned to gain credits to make upfor low grades on exams.

Comments on Exams

The exams are designed to be tough. For the most part, you won’t find the simple “regurgitate what was in the text” type of question. This is a concepts course and as such, concepts will be tested. Comprehending a concept entails “translating”, “interpreting”, and “extrapolating.” What this means in plain English is that for many test questions, you will not have seen something exactly like it before, and may even have to take what you’ve learned and apply it to a new scenario. Some additional (seemingly obvious) hints are listed below:

1)READ THE QUESTION & answer the question asked.

2)Do NOT change the question in your own mind.

3)Once you have convinced me you know the answer, STOP WRITING! Extra “correct” information will not count against you, but extra incorrect information will.

4)Do NOT shotgun an answer (writing down everything and expect me to pick out the correct stuff.)

5)In your answer, please do NOT waste your time or my time by restating the question, just answer the question.

6)READ THE QUESTION!!!

7)If you have any doubts, confusions, concerns, etc. about a question – ASK ME!!! If you’re not sure about what I am asking, ASK ME!!! Do NOT wait until we go over the exam and then say, "Gee, I didn’t understand what you meant. I was confused.” ASK!!! Otherwise I will assume that you understood the question, you just didn’t know the answer.

Other Important Policies

  1. All exams are close-book unless specified otherwise.
  2. You are required to turn in a Notebook for ABET purpose at the end of semester. The notebook should contain the following items in the correct order: Syllabus, Graded Homework Assignments, Graded Exams, Graded Lab Reports.
  3. No copying is allowed on any assignment. No credit will be given to both copier's and copiee's work.
  4. All assignments need to be neat and arranged in the correct order before being turned in. Neat means that the work is clear, easy to read, easy to follow, as if this was your job and you were presenting it in to your boss. No designs on napkins accepted! Otherwise, 20 percent of total points will be marked off. My recommendation is to do the work on scratch paper first, then neatly copy it to your final turn in.
  5. All assignments should include your work, or else no credit will be given.