EE 110 Lab Experiment #8 Fall 2007
NAME: ______
EXPERIMENT 8: Binary Adders (1 week)
The purpose of this laboratory is to design, build, and test a 2-bit binary adder circuit using the combinational logic techniques we have learned so far. Students will work individually.
Background:
The following diagrams illustrate the pinouts of some of the TTL devices we have in stock.
In all cases, pin 7 must connect to GND and pin 14 to the +5V power supply. Without proper power and ground connections, the device will not function. DO NOT wire these backwards – you will destroy the part!
Notice that we have 2-input exclusive-OR gates!
We recently discussed the half adder and full adder in class. Here are their essentials once again.
A two-bit adder can be constructed from the half adder and full adder in the following way. Here, X and Y are two-bit binary numbers. Their sum is Z, with a carry-out of C1.
Procedure:
1) Design a logic circuit to realize the half adder. (Minimizing your design is strongly advised. It will help you complete the construction and testing process more rapidly.)
Show your work below, including K-map, Boolean equations, and logic diagram. Include part numbers and pinouts.
2) Design a logic circuit to realize the full adder. Show your work below, including K-map, Boolean equations, and logic diagram. Include part numbers and pinouts.
3) Next, build your half adder and full adder circuits. Test these circuits individually to make sure they function according to the specified truth tables. Use switches as inputs and LEDs as outputs.
4) Draw a single schematic below that shows your half adder, full adder, and their interconnections to realize the two-bit adder specified previously.
5) Alter your breadboard realization to implement the two-bit adder according to your schematic in part 4. Use switches to input each binary operand and the 7-segment LED display to indicate the sum (including the carry-out bit).
6) Complete the truth table below to fully describe the observed behavior of your two-bit binary adder.
X1 / X0 / Y1 / Y0 / Operation / RequiredSum / Observed
Sum
0 / 0 / 0 / 0 / 0 + 0 / 0
0 / 0 / 0 / 1 / 0 + 1 / 1
0 / 0 / 1 / 0 / 0 + 2 / 2
0 / 0 / 1 / 1 / 0 + 3 / 3
0 / 1 / 0 / 0 / 1 + 0 / 1
0 / 1 / 0 / 1 / 1 + 1 / 2
0 / 1 / 1 / 0 / 1 + 2 / 3
0 / 1 / 1 / 1 / 1 + 3 / 4
1 / 0 / 0 / 0 / 2 + 0 / 2
1 / 0 / 0 / 1 / 2 + 1 / 3
1 / 0 / 1 / 0 / 2 + 2 / 4
1 / 0 / 1 / 1 / 2 + 3 / 5
1 / 1 / 0 / 0 / 3 + 0 / 3
1 / 1 / 0 / 1 / 3 + 1 / 4
1 / 1 / 1 / 0 / 3 + 2 / 5
1 / 1 / 1 / 1 / 3 + 3 / 6
7) Demonstrate the operation of your logic circuit to the teaching assistant or professor. Get their signature and comments regarding the functionality of your circuits.
TA Signature: ______
8) Refer to your schematic in step 4. Let’s assume each gate has a propagation delay of D units of time. What is the maximum number of gate delays possible from input to output in your design? Draw a concise diagram illustrating this worst-case delay path, showing the input(s), output(s), and gates involved.
9) Use the oscilloscope to measure the propagation delay of the path you identified in part 8.
Rising edge delay: tPLH = ______ns
Falling edge delay: tPHL = ______ns
Averaging the two readings and dividing by the number of gates involved, what is your estimate for D, the average gate delay in your circuit? D = ______ns
10) Redesign your two-bit adder without using the half adder and full adder as components. In other words, your design will have four inputs (X1, X0, Y1, Y0) and three outputs (C1, Z1, and Z0). Minimize your design. Show your work and the resulting logic diagram below.
11) Refer to your schematic in step 9. Again assuming each gate has a propagation delay of D units of time, what is the maximum number of gate delays possible from input to output in your design? Draw a concise diagram illustrating this worst-case delay path, showing the input(s), output(s), and gates involved.
12) Complete the following:
a. What results did you obtain in this experiment?
b. What difficulties did you have?
c. What are your conclusions? What did you learn about binary adders?
13) Once your work is complete, please dismantle your wiring and remove the chips you installed. (Leave the power bus wiring in place.) Return your chips to the correct places in the parts bin.
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