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Author: <Primary>
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1.License(OCP CLA Option)
Contributions to this Specification are made under the terms and conditions set forth in Open Compute ProjectContribution License Agreement (“OCP CLA”) (“Contribution License”) by:
[Contributor Name(s) or Company name(s)]
You can review the signed copies of the applicable Contributor License(s)for this Specification on the OCP website at
Usage of thisSpecification is governed by the terms and conditions set forth in [select one: Creative Commons Attribution 4.0 International License, Open Web Foundation Final Specification Agreement (“OWFa 1.0”), Open Compute Project Hardware License – Permissive (“OCPHL Permissive”), Open Compute Project Hardware License – Copyleft (“OCPHL Reciprocal”)] (“Specification License”).
You can review the applicable Specification License(s) executed by the above referenced contributors to this Specification on the OCP website at
Note: The following clarifications, which distinguish technology licensed in the Contribution License and/or Specification License from those technologies merely referenced (but not licensed), were accepted by the Incubation Committee of the OCP:
[insert “None” or a description of the applicable clarifications].
NOTWITHSTANDING THE FOREGOING LICENSES, THIS SPECIFICATION IS PROVIDED BY OCP "AS IS" AND OCP EXPRESSLY DISCLAIMS ANY WARRANTIES (EXPRESS, IMPLIED, OR OTHERWISE), INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, OR TITLE, RELATED TO THE SPECIFICATION. NOTICE IS HEREBY GIVEN, THAT OTHER RIGHTS NOT GRANTED AS SET FORTH ABOVE, INCLUDING WITHOUT LIMITATION, RIGHTS OF THIRD PARTIES WHO DID NOT EXECUTE THE ABOVE LICENSES, MAY BE IMPLICATED BY THE IMPLEMENTATION OF OR COMPLIANCE WITH THIS SPECIFICATION. OCP IS NOT RESPONSIBLE FOR IDENTIFYING RIGHTS FOR WHICH A LICENSE MAY BE REQUIRED IN ORDER TO IMPLEMENT THIS SPECIFICATION. THE ENTIRE RISK AS TO IMPLEMENTING OR OTHERWISE USING THE SPECIFICATION IS ASSUMED BY YOU. IN NO EVENT WILL OCP BE LIABLE TO YOU FOR ANY MONETARY DAMAGES WITH RESPECT TO ANY CLAIMS RELATED TO, OR ARISING OUT OF YOUR USE OF THIS SPECIFICATION, INCLUDING BUT NOT LIMITED TO ANY LIABILITY FOR LOST PROFITS OR ANY CONSEQUENTIAL, INCIDENTAL, INDIRECT, SPECIAL OR PUNITIVE DAMAGES OF ANY CHARACTER FROM ANY CAUSES OF ACTION OF ANY KIND WITH RESPECT TO THIS SPECIFICATION, WHETHER BASED ON BREACH OF CONTRACT, TORT (INCLUDING NEGLIGENCE), OR OTHERWISE, AND EVEN IF OCP HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1.License(OWF option)
Contributions to this Specification are made under the terms and conditions set forth in Open Web Foundation Contributor License Agreement (“OWF CLA 1.0”) (“Contribution License”) by:
[Contributor Name(s) or Company name(s)]
You can review the signed copies of the applicable Contributor License(s)for this Specification on the OCP website at
Usage of thisSpecification is governed by the terms and conditions set forth in [select one: Open Web Foundation Final Specification Agreement (“OWFa 1.0”), Open Compute Project Hardware License – Permissive (“OCPHL Permissive”), Open Compute Project Hardware License – Copyleft (“OCPHL Reciprocal”)] (“Specification License”).
You can review the applicable Specification License(s) executed by the above referenced contributors to this Specification on the OCP website at
Note: The following clarifications, which distinguish technology licensed in the Contribution License and/or Specification License from those technologies merely referenced (but not licensed), were accepted by the Incubation Committee of the OCP:
[insert “None” or a description of the applicable clarifications].
NOTWITHSTANDING THE FOREGOING LICENSES, THIS SPECIFICATION IS PROVIDED BY OCP "AS IS" AND OCP EXPRESSLY DISCLAIMS ANY WARRANTIES (EXPRESS, IMPLIED, OR OTHERWISE), INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, OR TITLE, RELATED TO THE SPECIFICATION. NOTICE IS HEREBY GIVEN, THAT OTHER RIGHTS NOT GRANTED AS SET FORTH ABOVE, INCLUDING WITHOUT LIMITATION, RIGHTS OF THIRD PARTIES WHO DID NOT EXECUTE THE ABOVE LICENSES, MAY BE IMPLICATED BY THE IMPLEMENTATION OF OR COMPLIANCE WITH THIS SPECIFICATION. OCP IS NOT RESPONSIBLE FOR IDENTIFYING RIGHTS FOR WHICH A LICENSE MAY BE REQUIRED IN ORDER TO IMPLEMENT THIS SPECIFICATION. THE ENTIRE RISK AS TO IMPLEMENTING OR OTHERWISE USING THE SPECIFICATION IS ASSUMED BY YOU. IN NO EVENT WILL OCP BE LIABLE TO YOU FOR ANY MONETARY DAMAGES WITH RESPECT TO ANY CLAIMS RELATED TO, OR ARISING OUT OF YOUR USE OF THIS SPECIFICATION, INCLUDING BUT NOT LIMITED TO ANY LIABILITY FOR LOST PROFITS OR ANY CONSEQUENTIAL, INCIDENTAL, INDIRECT, SPECIAL OR PUNITIVE DAMAGES OF ANY CHARACTER FROM ANY CAUSES OF ACTION OF ANY KIND WITH RESPECT TO THIS SPECIFICATION, WHETHER BASED ON BREACH OF CONTRACT, TORT (INCLUDING NEGLIGENCE), OR OTHERWISE, AND EVEN IF OCP HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Table of Contents
1.License (OCP CLA Option)
1.License (OWF option)
Table of Contents
2.Scope
Overview
3.Rack Compatibility
4.Physical Specifications
4.1Block Diagram
4.2Placement and Form Factor
4.3CPU and Memory
4.4Platform Controller Hub (PCH)
4.5PCIe
4.6
4.7PCB Stack‐Up
4.8Figures & Illustrations
5.BIOS
5.1BIOS Chip
5.2BIOS Source Code
5.3BIOS Feature Requirements
5.4Firmware Feature Plan of Record
6.BMC
6.1Management Network Interface
6.2Local Serial Console and SOL
6.3Graphic and GUI
6.4Remote Power Control and Power policy
6.5Port 80 POST
6.6Power and System Identification LED
6.7Platform Environment Control Interface (PECI)
6.8Power and Thermal Monitoring and power limiting
6.9SMBUS Diagram
6.10Sensors/Events
6.11SEL
6.12FSC in BMC
6.13OEM commands
6.14BMC FW chip and Firmware Update
6.15BMC Update Dual PCH flash
6.16BMC Update and Access CPLD
6.17BMC Time Sync
6.18PCIe and Mezzanine card Thermal monitoring
6.19BMC PPIN Implementation
6.20BMC Average Power Reporting
6.21BMC Access and Update VR Firmware
6.22BMC MSR Dump from OOB
6.23BMC Network Status
6.24BMC Secure boot.
7.Thermal Design Requirements
7.1Data Center Environmental Conditions
7.2Server operational condition
7.3Thermal Kit Requirements
8.I/O System
8.1PCIe x32 Slot/Riser Card
8.2DIMM Sockets
8.3Mezzanine Card
8.4Network
8.5USB
8.6SATA
8.7M.2
8.8Debug Header
8.9Switches and LEDs
8.10Fan connector.
8.11TPM Connector and Module
8.12Sideband Connector
8.13VGA header
9.Rear Side Power, I/O and Midplane
9.1Overview of Footprint and Population Options
9.2Rear Side Connectors
9.3Midplane
10.ORv2 Implementation
10.1Cubby for ORv2
10.2Intel Motherboard V4.0‐ORv2 Power Delivery
10.3Intel Motherboard V4.0‐ORv2 Single‐Side Sled
10.4Intel Motherboard V4.0‐ORv2 Double Side Sled
11.Mechanical
11.1Single Side Sled mechanical
11.2Double Side Sled Mechanical
11.3Fixed Locations
11.4PCB Thickness
11.5Heat Sinks and ILM
11.6Silk Screen
11.7DIMM Connector Color
11.8PCB Color
12.Motherboard Power System
12.1Input Voltage
12.2Hot‐Swap Controller (HSC) Circuit
12.3CPU VR
12.4DIMM VR
12.5MCP (Multi Core Package) VRM
12.66 VRM design guideline
12.7Hard Drive Power
12.8System VRM efficiency
12.9Power On
12.10High power use case...
12.11
13.Environmental and Regulations
14.Environmental Requirements
14.1Vibration & Shock
14.2Regulations
14.3Labels and Markings
15.Prescribed Materials
15.1Disallowed Components
15.2Capacitors & Inductors
15.3Component De‐rating
16.Reliability and Quality
16.1Specification Compliance
16.2Change Orders
16.3Failure Analysis
16.4Warranty
16.5MTBF Requirements
16.6Control Change Authorization and Revision Control
16.7PCB Tests
16.8Secondary Component
1
Date: January, 2000Page
2.Scope
This document defines the technical specifications for the <product name> used in Open Compute Project <hardware name>
1
Date: January, 2000Page
Open Compute Project <Specification Title>
Overview
<Describe your product. Explain its utility within the Open Compute Project ecosystem.>
Sections 3 – 18 are suggested or example sections.
3.Rack Compatibility
4.Physical Specifications
4.1Block Diagram
4.2Placement and Form Factor
4.3CPU and Memory
4.4Platform Controller Hub (PCH)
4.5PCIe
4.6PCB Stack‐Up
4.7Figures & Illustrations
5.BIOS
5.1BIOS Chip
5.2BIOS Source Code
5.3BIOS Feature Requirements
5.4Firmware Feature Plan of Record
6.BMC
6.1Management Network Interface
6.2Local Serial Console and SOL
6.3Graphic and GUI
6.4Remote Power Control and Power policy
6.5Port 80 POST
6.6Power and System Identification LED
6.7Platform Environment Control Interface (PECI)
6.8Power and Thermal Monitoring and power limiting
6.9SMBUS Diagram
6.10Sensors/Events
6.11SEL
6.12FSC in BMC
6.13OEM commands
6.14BMC FW chip and Firmware Update
6.15BMC Update Dual PCH flash
6.16BMC Update and Access CPLD
6.17BMC Time Sync
6.18PCIe and Mezzanine card Thermal monitoring
6.19BMC PPIN Implementation
6.20BMC Average Power Reporting
6.21BMC Access and Update VR Firmware
6.22BMC MSR Dump from OOB
6.23BMC Network Status
6.24BMC Secure boot.
7.Thermal Design Requirements
7.1Data Center Environmental Conditions
7.2Server operational condition
7.3Thermal Kit Requirements
8.I/O System
8.1PCIe x32 Slot/Riser Card
8.2DIMM Sockets
8.3Mezzanine Card
8.4Network
8.5USB
8.6SATA
8.7M.2
8.8Debug Header
8.9Switches and LEDs
8.10Fan connector.
8.11TPM Connector and Module
8.12Sideband Connector
8.13VGA header
9.Rear Side Power, I/O and Midplane
9.1Overview of Footprint and Population Options
9.2Rear Side Connectors
9.3Midplane
10.ORv2 Implementation
10.1Cubby for ORv2
10.2Intel Motherboard V4.0‐ORv2 Power Delivery
10.3Intel Motherboard V4.0‐ORv2 Single‐Side Sled
10.4Intel Motherboard V4.0‐ORv2 Double Side Sled
11.Mechanical
11.1Single Side Sled mechanical
11.2Double Side Sled Mechanical
11.3Fixed Locations
11.4PCB Thickness
11.5Heat Sinks and ILM
11.6Silk Screen
11.7DIMM Connector Color
11.8PCB Color
12.Motherboard Power System
12.1Input Voltage
12.2Hot‐Swap Controller (HSC) Circuit
12.3CPU VR
12.4DIMM VR
12.5MCP (Multi Core Package) VRM
12.66 VRM design guideline
12.7Hard Drive Power
12.8System VRM efficiency
12.9Power On
12.10High power use case...
12.11
13.Environmental and Regulations
14.Environmental Requirements
14.1Vibration & Shock
14.2Regulations
14.3Labels and Markings
15.Prescribed Materials
15.1Disallowed Components
15.2Capacitors & Inductors
15.3Component De‐rating
16.Reliability and Quality
16.1Specification Compliance
16.2Change Orders
16.3Failure Analysis
16.4Warranty
16.5MTBF Requirements
16.6Control Change Authorization and Revision Control
16.7PCB Tests
16.8Secondary Component
1
Date: January, 2000Page