Arab Academy for Science, Technology & Maritime Transport

Arab Academy for Science, Technology & Maritime Transport

School of Engineering

Computer Department

Computer Organization CC312

Mid-term No. 1 November, 2002

Time: 90 minutes M. Saeb

Answer all of the following problems.

Problem 1:

Check the correct answers for the following questions:

1.1 Von Neumann Architectural Model refers to a multiprocessing system. (…)

1.2 Pre-fetching refers to the time difference between memory cycle time and processor speed. (…)

1.3 Memory hierarchy refers to the high speed of the cache memory. (…)

1.4 A micro-operation consists of a set of macro-operations. (…)

1.5 The indirect addressing mode bit is used to indicate that the address space is not enough for a large program. (…)

Problem 2:

Design a bus system, using MUX’s, for moving data between ten 8-bit registers. Indicate how the destination register is selected.

Answer:

Problem 3:

Find the conceptual hardware block diagram for the following high –level statements:

3.1 if [R1] = FFF1 then R2 ← R3

3.2 if (x= 1) then R1← R3 else if (x .y =1) then R1← R2

Answer:

Problem 4:

A 32-bit memory unit has 67108864 memory words. Find the number of address lines and data lines for this memory unit.

Answer:

Address lines =……..

Data lines =……..

Problem 5:

Find the error in each of the following RTL statements, and sketch the conceptual block diagram of the correct version:

6.1 : PC ← AR

6.2 : AC ← IR,

where PC is the program counter, AR is the address register, AC is the accumulator and IR is the instruction register.

Answer:

Problem 8:

Design a four-bit ALU with the following operations:

AND, OR, XOR, ADD.

Answer:

Problem 9:

If the contents of the accumulator [AC] is given by: [AC] = A937, find the contents of Program counter [PC], [AR], and [DR] for the instruction stored in memory location 021 shown below:

Answer: [PC]: ……. [AR]: ……..

[AC]: ……. [DR]: ……..

021

083