CHAPTER 1
INTRODUCTION
1.1 BACKGROUND
Embedded system is an intelligent system that has the capability of processing, monitoring and controlling. It may comprise of Sensors, Microcontrollers, FPGA, ASIC, etc. It typically has a specialized function with programs stored on ROM. Examples of embedded systems are automatic environmental systems, security systems, and entertainment systems.
An added feature in any embedded system is its ability to communicate. The communication can be via Bluetooth, WI-FI, GSM, or Ethernet cables. The TCP/IP protocol is a widely used standard for modern digital communication.
A weather station is a facility with instruments and equipment to make weather observations by monitoring atmospheric conditions.
The project we have undertaken is “IP based Weather Station (Mausam Parisuchak)”. It includes the three concepts we discussed earlier viz. embedded systems, TCP/IP communication, and weather station. It provides real time data of weather in remote/inaccessible locations through a wireless /wired connection.
1.2 NEED OF THE PROJECT
Nepal being a mountianous country it is difficult to build some development infrastructures. One of the biggest mountain ranges of the world, The Himalayas, lies in Nepal. Various organisation like ACAP, ICIMOD, and many other NGOs and GOs are working to solve this problem through sustainable tourism and natural disaster mitigation (eg:- bursting of glacier lakes, avalanche, etc).
The existing weather data collection technology in Nepal is backward for example in Godawari ICIMOD is implementing data loggers which collect data and logged into the magnetic hard disk which is swept at a frequency of 48 hrs manually. Our National Meteorological Department (NMD) has manual data collection process. Sometimes this may result in the problem of unavailability of weather data at the time of necessity. Our project “IP based weather station” can play a vital by addressing to these problems and providing data which can be used for monitoring various activities.
1.3 OBJECTIVE
Main objective of our project is to make internet/ip enabled embedded device serving as advanced remote data logger which can be accessed remotely via workstation. Our internet enabled device “alias: Mausam Parisuchak” will be interfaced with various sensors like temperature sensor, humidity sensor.
This project finds its application in various fields like Weather Forecasting Department, organizations like ICIMOD (International Center for Integrated Mountain Development), ACAP (Annapurna Conservation Area Project), etc which works on remote monitoring and development of the mountainous areas.
Looking at the benefits of its technical efficiency and practical implementation along with its coverage of course materials like Telecommunication, Instrumentation, Electronic Circuits, we selected this project as our final year project.
On completion of this project, our module will be used by ICIMOD at Godawari for its practical implementation.
1.4 OUTLINE OF THE PROJECT
The system designed in our project applied to monitor weather data from the remote field. The weather data is then communicated or transmitted to the central server through an Ethernet connection. The server is a web and database server which holds all the past data transmitted by the system and also servers web pages to the public internet users.
The sensors we have decided to use are the Temperature and Light Dependent Sensors. They are connected to the PIC18F4620 microcontroller.
The PIC18F4620 microcontroller is used as a computer and the ENC28J60 is used to connect the microcontroller to a LAN. The LCD display and the serial port interface provide more functionality to the overall system. The LCD displays the current and any new IP address of the Ethernet chip.
The serial connection is used rarely in our system like to configure our module (e.g. to change the IP address). It can also be used for debugging purposes. Thus serial connection is not so compulsory section in our project.
CHAPTER 2
LITERATURE REVIEW
2.1 HARDWARE COMPONENT OVERVIEW
Our project comprises of following hardware components:
· Sensors
o Temperature
o LDR
· PIC18F4620 microcontroller
· ENC28J60 Ethernet chip
· Magnetic Ethernet jack
· RS232 Serial port
· LCD
· LAN connectivity
2.1.1 Sensors
2.1.1.1 Temperature sensor
The LM35 is an integrated circuit sensor that can be used to measure temperature with an electrical output proportional to the temperature (in oC). The LM35 thus has an advantage over linear temperature sensors calibrated in ° Kelvin, as the user is not required to subtract a large constant voltage from its output to obtain convenient Centigrade scaling. The LM35's low output impedance, linear output, and precise inherent calibration make interfacing to readout or control circuitry especially easy. The sensor circuitry is sealed and not subject to oxidation, etc. The LM35 generates a higher output voltage than thermocouples and may not require that the output voltage be amplified.
Features
• / Calibrated directly in ° Celsius (Centigrade)• / Linear + 10.0 mV/°C scale factor
• / 0.5°C accuracy guaranteeable (at +25°C)
• / Rated for full -55° to +150°C range
• / Suitable for remote applications
• / Low cost due to wafer-level trimming
• / Operates from 4 to 30 volts
• / Less than 60 µA current drain
• / Low self-heating, 0.08°C in still air
• / Nonlinearity only ±¼°C typical
• / Low impedance output, 0.1 Ohm for 1 mA load
2.1.1.2 LDR (Light Dependent Resistor)
Light Dependent Resistor (LDR) also known as photoresistor is an electronic component whose resistance changes with the incident light intensity. It is made of a high-resistance semiconductor. If light falling on the device is of high enough frequency, photons absorbed by the semiconductor give bound electrons enough energy to jump into the conduction band. The resulting free electron (and its hole partner) conduct electricity, thereby lowering resistance.
The resistance of LDR may be 5000 ohm in daylight and 20000000 ohm in dark condition. Fig 2.2 LDR
Fig2.3: Characterstics curve of LDR Fig2.4: Typical Application circuit
2.1.2 Microcontroller (PIC18f4620)
We could have used different microcontroller such as 8051, AVR but we opted for PIC family of microcontroller. It has the following advantages
1. It has high memory space.
2. It has built in ADC
3. It is developed using nanoWatt TECHNOLOGY that reduces power consumption during operation.
We specifically choose PIC18f4620 because
1. It has large number of I/O pins.
2. It has 13 ten bits ADC channels which makes it easy for us to interface the
sensors.
Fig2.5: Pin Configuration of PIC18F4620
The PIC18f4620 has 5-ports. They are A, B, C, D, E. Port A, B, C, D are of 8-bits in length but port E is of only 4-bits length. All these ports are in digital I/O besides A6 and A7. The oscillator is connected to these pins. The analog input pins are in A0,A1,A2,A3,A5,E0,E1,E2,B0,B1,B2,B3,B4. The serial port data to the computer is transmitted from C6 and received form C7. The serial data to the Ethernet chip is transmitted from C5 and received from C4. If pin no. 1 is set to low the data memory of microcontroller will be reset.
Features / PIC18F4620Operating frequency / DC upto 40MHz
Program memory / 64kb
Temporary data memory(Ram) / (Approx.)4kb
Permanent data memory(EEPROM) / 1kb
I/O Ports / Ports A,B,C,D,E
Serial communication / MSSP,USART
10-bits A/D Module / 13 channels
Instruction sets / 75 instruction
Table 2.1: Features of PIC18f4620
There are three types of memory in PIC18 Enhanced microcontroller devices:
•Program Memory
•Data RAM
•Data EEPROM
As Harvard architecture devices, the data and program memories use separate busses; this allows for concurrent access of the two memory spaces. The data EEPROM, for practical purposes, can be regarded as a peripheral device, since it is addressed and accessed through a set of control registers.
i. Program Memory
PIC18 microcontrollers implement a 21-bit program counter, which is capable of addressing a 2-Mbyte program memory space. Accessing a location between the upper boundary of the physically implemented memory and the 2-Mbyte address will return all ‘0’s (a NOP instruction). PIC18F4620 have 64Kbytes of Flash memory and can store up to 32,768 single-word instructions. PIC18 devices have two interrupt vectors. The Reset vector address is at 0000h and the interrupt vector addresses are at 0008h and 0018h. Writing or erasing program memory will cease instruction fetches until the operation is complete. The program memory cannot be accessed during the write or erase, therefore, code cannot execute. An internal programming timer terminates program memory.
Fig2.6: Memory Organisation
ii. Data Memory
The data memory in PIC18 devices is implemented as static RAM. Each Register in the data memory has a 12-bit address, allowing up to 4096 bytes of datamemory. The memory space is divided into as many as 16 banks that contain 256 bytes each; PIC18F4620 device implement all 16 banks. The data memory contains Special Function Registers (SFRs) and General Purpose Registers (GPRs). The Special Function Registers (SFRs) are registers used by the CPU and peripheral modules for controlling the desired operation of the device. These registers are implemented as static RAM. SFRs start at the top of data memory (FFFh) and extend downward to occupy the top half of Bank 15 (F80h to FFFh). GPRs are used for data storage and scratchpad operations in the user’s application. The entire data memory may be accessed by Direct, Indirect or Indexed Addressing modes.
iii. Data EEPROM
The data EEPROM is a nonvolatile memory array separate from the data RAM and program memory that is used for long-term storage of program data. It is not directly mapped in either the register file or program memory space but is indirectly addressed through the Special Function Registers (SFRs). The EEPROM is readable and writable during normal operation.
The EEPROM data memory is rated for high erase/write cycle endurance. A byte write automatically erases the location and writes the new data (erase-before-write). The write time is controlled by an on-chip timer; it will vary with voltage and temperature as well as from chip to chip.
2.1.3 Ethernet chip (ENC28J60)
There are many Ethernet chip in the markets but we choose ENC28J60 because it is produced from the same manufacturer as the PIC. Thus it is easier for us to interface the two chips from microchip.
The ENC28J60 is a stand-alone Ethernet controller with an industry standard Serial Peripheral Interface (SPI). It is designed to serve as an Ethernet network interface for any controller equipped with SPI. The ENC28J60 meets all of the IEEE 802.3 specifications. It incorporates a number of packet filtering schemes to limit incoming packets. It also provides an internal DMA module for fast data throughput and hardware assisted IP checksum calculations. Communication with the host controller is implemented via two interrupt pins and the SPI, with data rates of up to 10Mb/s. Two dedicated pins are used for LED link and network activity indication.
With the ENC28J60, two pulse transformers and a few passive components are all that is required to connect a microcontroller to a 10Mbps Ethernet network.The ENC28J60 is designed to operate at 25MHz with a crystal connected to the OSC1 and OSC2 pins.
The ENC28J60 does not support automatic duplex negotiation. If it is connected to an automatic duplex negotiation enabled network switch or Ethernet controller, the ENC28J60 will be detected as a half-duplex device. To communicate in Full-Duplex mode, the ENC28J60 and the remote node (switch, router or Ethernet controller) must be manually configured for full-duplex operation.
2.1.3.1 Ethernet Controller Features:
1. IEEE 802.3 compatible Ethernet controller
2. Receiver and collision squelch circuit
3. Supports one 10BASE-T port with automatic polarity detection and correction
4. Supports Full and Half-Duplex modes
5. Programmable automatic retransmit on collision
6. Programmable padding and CRC generation
7. Programmable automatic rejection of erroneous packets
8. SPI Interface with speeds up to 10Mb/s
2.1.3.2 Ethernet Controller Block Diagram
Fig2.7: Detail Overview of ENC28J60
The ENC28J60 consists of seven major functional blocks:
1. An SPI interface that serves as a communication channel between the host controller and the ENC28J60.
2. Control Registers which are used to control and monitor the ENC28J60.
3. A dual port RAM buffer for received and transmitted data packets.
4. An arbiter to control the access to the RAM buffer when requests are made from DMA, transmit and receive blocks.
5. The bus interface that interprets data and commands received via the SPI interface.
6. The MAC (Medium Access Control) module that implements IEEE 802.3 compliant MAC logic.
7. The PHY (Physical Layer) module that encodes and decodes the analog data that is present on the twisted pair interface.
The device also contains other support blocks, such as the oscillator, on-chip voltage regulator, level translators to provide 5V tolerant I/Os and system control logic.
Fig2.8: Pin Configuration of ENC28J60
Fig2.9: Typical Application Circuit of Ethernet Chip
All memory in the ENC28J60 is implemented as static RAM. There are three types of memory in the ENC28J60:
•Control Registers
•Ethernet Buffer
•PHY Registers
The control registers’ memory contains Control Registers (CRs). These are used for configuration, control and status retrieval of the ENC28J60. The Control Registers are directly read and written to by the SPI interface.The Ethernet buffer contains transmit and receive memory used by the Ethernet controller in a single memory space. The sizes of the memory areas are programmable by the host controller using the SPI interface. The Ethernet buffer memory can only be accessed via the read buffer memory and write buffer memory. The PHY registers are used for configuration, control and status retrieval of the PHY module. The registers are not directly accessible through the SPI interface; they can only be accessed through the Media Independent Interface (MII) implemented in the MAC.