Si51x/3x/55x/57x/59x XO/VCXO Packaging FAQ

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Overview

This document is intended to address common questions about the packaging technology used by the Silicon Laboratories Si51x/53x/55x/57x/59xXO/VCXO products. The term Si5xx as used in this document only refers to these product families.

FAQs

1.Are Silicon Laboratories XO and VCXO devices compatible with other XO and VCXO suppliers’ packages?

  • Yes, all single and dual frequency Si53x, Si590/591 XOs and Si55x, Si595 VCXOs are supplied in an industry-standard, 6-pin, 5mm x 7mm ceramic, lead-less chip carrier packages (CLCC).
  • All Si534 quad frequency XOs, Si554 quad frequency VCXOs and Si570/571/598/599 any frequency I2C programmable oscillators are packaged in 8-pin 5x7mm CLCCs that includes two extra pins on each end of the package. Refer to the datasheets at for more information.
  • The Si570 and Si598 are drop-in compatible with each other. The Si571 and Si599 are drop-in compatible with each other.
  • The Si51x devices are supplied in industry-standard, 4-pin and 6-pin, 5mm x 7mm ceramic, and 3.2mm x 5 mm ceramic, lead-less chip carrier packages (CLCC).

2.Are the pinouts and PCB land patterns compatible with industry standards?

  • Yes, single frequency XO/VCXO devices allow drop-in replacement of existing XOs and VCXOs.

3.Where can I find recommended PCB landing pattern information?

  • PCB land pattern information is contained in the datasheets posted on the Silicon laboratories XO and VCXO websites:

4.What are the package dimensions?

  • The package dimensions are: 5mm x 7mm x 1.65mm, with a 2.54mm lead pitch.
  • The Si51x devices are also available in:

3.2mm x 5mm x 1.17mm, with a 2.54 mm lead pitch (4 pin part)

3.2mm x 5mm x 1.17mm, with a 1.27 mm lead pitch (6 pin part)

  • Please refer to the datasheets at for more information.

5.What is the material composition of the pins?

  • The pad composition on the 5x7mm CLCC package is NiAu (nickel gold).
  • Ni (nickel) thickness ranges between: 1.27 and 8.89 µm.
  • Au (gold) thickness is 0.3 µm (minimum) to 1.0 µm (maximum).
  • The pad compositions and metal thicknesses are the same between the 5m x 7mm and 3.2mm x5 mm CLCC packages. However the material proportions are different. Please refer to the webpage Search environmental databy part number.

6.Are the Si5xx productsRoHS compliant?

  • Yes –refer to the Environmental Data Part Number search on the website to search for the certificate of compliance.

7.Are the Si5xx “lead-free”?

  • Yes – please refer to the RoHS Certificate of Compliance posted on the Silicon Laboratories website.

8.Are the devices also available in “leaded” packaging?

  • No, there is only one package ordering option for these packages, which specifies both “lead-free” and RoHS compliance.

9.What is the MSL (Moisture Sensitivity Level) of the ceramic packages?

  • Per to the JEDEC specification (IPC/JEDEC J-STD-020C, July 2004), the devices are classified as MSL 1, which refers to the least moisture sensitive classification level.
  • Although the JEDEC specification applies to “non-hermetic” (e.g., plastic) packaging, Silicon Laboratories tests and guarantees our oscillators’ products’ Moisture Sensitivity Level (MSL) according to the JEDEC specifications noted above.

10.Are the devices compatible with both leaded and “lead-free” assembly processes?

  • Yes, the device’s NiAu lead finish is compatible with both leaded (SnPb) and “lead-free” solder processes and pastes.

11.What are the maximum reflow temperatures and profiles recommended for “lead-free” and “leaded” (SnPb) solder reflow processes?

  • For lead-free processes, the Peak/Classification Temperature (Tp) is 260 °C.
  • For leaded (SnPb) processes, the Peak/Classification Temperature (Tp) is 240 °C.
  • Refer to the latest JEDEC specification (IPC/JEDEC J-STD-020C, July 2004). Excerpts below are included for reference only, to be used as starting values for developing a specific assembly profile.
  • All temperatures refer to topside of the package, measured on the package body surface.

Profile Feature / SnPb Eutectic Assembly / Pb-Free Assembly
Average Ramp-Up Rate
(Tsmax to Tp) / 3 °C/second max. / 3 °C/second max.
Preheat
  • Temperature Min (Tsmin)
  • Temperature Max (Tsmax)
  • Time (tsmin to tsmax)
/ 100 °C
150 °C
60 to 120 sec / 150 °C
200 °C
60 to 180 sec
Time maintained above:
  • Temperature (TL)
  • Time (tL)
/ 183 °C
60 to 150 sec / 217 °C
60 to 150 sec
Peak/Classification Temperature (Tp) / 240 °C / 260 °C
Time within 5 °C of actual
Peak Temperature (tp) / 10-30 seconds / 20-40 seconds
Ramp-Down Rate / 6 °C/second max. / 6 °C/second max.
Time 25 °C to Peak Temperature / 6 minutes max. / 8 minutes max.

12.Are any flame retardants (halogen compounds) used in the Si5xx packages?

  • Silicon Laboratories oscillator packages (CLCC) are Halogen and Phosphorous Free.

13. What is the maximum junction temperature for the Si5xx devices?

  • The devices were designed to support a maximum junction temperature of 125°C, so this temperature should not be exceeded during device operation.
  • The absolute maximum operating junction temperature above which damage may occur is TJ = 150 ºC.

14.What is ΘJC for the Si5xx devices?

  • ΘJCfor the Si53x/55x/57x/59x devices has been simulated to be 38.8 ºC/W under natural convection using a JEDEC 4 layers 2S2P board.
  • ΘJC for the Si51x devices has been simulated to be 61 ºC/W under natural convection using a JEDEC 4 layers 2S2P board.

15.What is ΘJA for the Si5xx devices?

  • ΘJAfor the Si53x/55x/57x/59x devices has been simulated to be 84.6 ºC/W under natural convection using a JEDEC 4 layers 2S2P board.
  • ΘJAfor the Si53x/55x/57x/59x devices has been estimated previously to be approximately 40 ºC/W based on measurements using our evaluation boards. (Note: The eval board layout, traces, connectors, etc. drop the lid case temp from an expected simulated 23 ºC temp rise to a cooler measured 9 ºC temp rise.)
  • ΘJA for the Si51x devices has been simulated to be 110 ºC/W under natural convection using a JEDEC 4 layers 2S2P board.

16.What is the typical temperature rise of Si5xx devices?

  • For the Si53x/55x/57x/59x devices, in still air, when directly soldered to a multilayer board, the temperature rise from self-heating, as measured on the device surface, is about 9°C. If the device is mounted in a small spring latch socket, temperature rise may increase to somewhere between 20°C to 30°C.

17.Are the devices hermetically sealed?

  • The CLCC cavity is hermetically sealed during the lid sealing process.

18.What are the qualification test requirements for Silicon Laboratories’ lead-free, RoHS-compliant, CLCC package technology?

  • Because lead-free PCB assembly processes require higher reflow temperatures, the Si5xx CLCC package assemblies have been qualified to be compatible with lead-free processes and temperatures.
  • For representative package qualification tests, please refer to the table below.
  • Final test results are included in the Si5xx Product Qualification Report.

Inspection Parameter / Method
Mechanical Shock / MIL-STD-883, Method 2002
Mechanical Vibration / MIL-STD-883, Method 2007
Solder-ability / MIL-STD-883, Method 2003
Gross & Fine Leak / MIL-STD-883, Method 1014
Physical Dimensions / MIL-STD-883, Method 2016
Resistance to Solder Heat / MIL-STD-883, Method 2036
Wire pull and ball shear / MIL-STD-883, method 2011
Die Shear / MIL-STD-883, method 2019
Internal Moisture Content / MIL-STD-883, method 1018
External Visual / MIL-STD-883, Method 2009
Internal Visual / MIL-STD-883, Method 2014
HT Storage / JEDEC JESD22 JA103
ELFR / JEDEC JESD22 JA108
Temperature Cycle / JEDEC JESD22 JA104
HTOL / JEDEC JESD22 JA108

19.Are the oscillator products available in Tape & Reel?

  • Yes, all oscillator products are available in Tape & Reel with an 8mm pitchand 12mm carrier tape or 16mm carrier tape width, as noted below for the CLCC package types.
  • To specify Tape & Reel, please include the “R” suffix on the part number when you place your oscillator order. Please refer to for additional part number information.
  • For example: The “R” at the end of the 530AA1000M00DGRpart numberspecifies the Tape & Reel option.
  • Tape & Reel specificationsand quantity informationfor all Silicon Laboratories products are available upon request from your local sales representative. The relevant XO/VCXO packaging subsection is included below for convenience:

Pkg / # of Leads / Package Description / CARRIER TAPE / Reel Size Diameter (inch) / Reel Hub Diameter (inch) / Pin-1 Orientation (Quadrant)
Approved Suppliers / Carrier Tape P/N / Width / Pitch / Pocket Size / Parts per Meter
W (mm) / P1 (mm) / A0 (mm) / B0 (mm) / K0 (mm) / K1 (mm)
CLCC / 4 / 4CLCC3.2x5 / Advantek / BCA021-A / 12 / 8 / 3.7 / 5.5 / 1.4 / N/A / 125 / 7 / 2.5 / 1
CLCC / 6 / 6CLCC3.2x5 / Advantek / BCA021-A / 12 / 8 / 3.7 / 5.5 / 1.4 / N/A / 125 / 7 / 2.5 / 1
CLCC / 6 / 6CLCC5x7 / Advantek / 87011A-B / 16 / 8 / 5.6 / 7.6 / 1.9 / N/A / 125 / 7 / 2.5 / 1
CLCC / 8 / 8CLCC5x7 / Advantek / 87011A-B / 16 / 8 / 5.6 / 7.6 / 1.9 / N/A / 125 / 7 / 2.5 / 1

Tape Pitch / 8 mm
Minimum Number of pockets for leader / 51
Minimum Number of pockets for trailer / 39

Table for minimum number of pockets for leader and trailer for 7 inch reels

  1. How much do the Si5xx oscillators weigh?

Please refer to the webpage Search environmental databy part number. Log in and search for the base part number such as 510 or a specific P/N such as 510AAA000174AAG. Select config 1 and review the Detailed Device Composition online to read the Total Unit Weight or Material Weight, e.g. 184.43 grams.

Si51x, Si53x, Si55x, Si57x, Si59x Packaging FAQ

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