/ WSEAS TRANSACTIONS
on CIRCUITS and SYSTEMS

Issue 3, Volume 6, March 2007

ISSN 1109-2734 http://www.wseas.org
Low Voltage Low Glitch Current-Steering DAC Overlapping the Voltage Reference Circuit / 273
Mircea Tomoroga, Lucian Jurca, Mircea Ciugudean, Corneliu Toma
Influence of MOFSET Parameters in its Parasitic Capacitances and their Impact in Digital Circuits / 281
Nebi Caka, Milaim Zabeli, Myzafere Limani, Qamil Kabashi
Facial Expression Recognition and Synthesis for Virtual Miyazawa Kenji System / 288
Jun Hakura, Mamoru Kashiwakura, Youich Hiyama, Masaki Kurematsu, Hamido Fujita
Temperature Compensated Crystal Oscillator Based on Current Conveyor and Thermistor Network / 296
Soon Jai Yi, Hang Geun Jeong, Seong Ik Cho
Single-Stage Soft-Switching AC-DC Flyback Converter with Input Current Shaping / 302
Lon-Kou Chang, Yen-Ming Liu
On State-space Realizations of Composition of Functions / 310
Jose-Job Flores-Godoy, Guillermo Fernandez-Anaya
An Area-efficient Merged Synchronous Mirror Delay for Delay Locked Loop and Duty Cycle Correction / 316
Seok-Yong Hong, Seong-Ik Cho, Hang-Geun Jeong
General Maneuver Algorithm Description and Typical Mode Analysis for a Four-Steer-Four-Drive Mobile Robot / 322
He Xu, Weida Wang, Marie Bernard Sidibe
1.6Gb/s Clock and Data Recovery Circuit of Oversampling Method without the Reference Clock / 330
Kang-Jik Kim, Seong-Ik Cho, Hang-Geun Jeong
A Novel Control System of 230kA DC Power Source with Thyristor, Phase-Shifting Rectifier Transformer and On-Load Tap Changer / 336
Qiao Shutong, Jiang Jianguo, Wu Xiaojie
Application of a Limit Theorem in the Open Queueing Networks / 342
Saulius Minkevicius
Hybrid Verification Technique for High-Level Synthesis of Dataflow Algorithms / 348
Tsung-Hsi Chiang, Lan-Rong Dung
Memory-Efficient VLSI Architecture for 2-D Integer Lifting-Based DWT using Interlaced Read Scan Algorithm / 355
Chih-Hsien Hsia, Jen-Shiun Chiang
Optimal Expression for Fixed Polarity Dual Reed-Muller Forms / 364
Khalid Faraj, A.E.A. Almaini
Decision Diagrams using 2 Variable Nodes / 372
P. Oh, A.E.A. Almaini
A Dual-Mode USB Interface Controller Chip Design for Low-Power Mobile Devices / 380
Chuan-Sheng Lin, Lan-Rong Dung
Loop Pipeline Scheduling for Assignment Constrained Iteration Period Minimization / 389
Koji Ohashi, Mineo Kaneko
An Overall Condition Monitoring System of High Voltage SF6 Circuit Breaker / 397
Yue Dong, Dengming Xiao
Novel Broadband 3-dB Directional Coupler Design Method / 403
Ozlem A. Sen, Celal Dudak, Tunahan Kirilmaz