MICROCONTROLLER BASED PEOPLE FINDER

PSEUDO CODE FOR IMPLEMENTING CMX882 -

EMPLOYS DIP SWITCH TO SIMULATE POLL, PTT and MONITOR BUTTONS

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CORI KING – ENEE 498C

CORI KING

ENEE 498C - Capstone II: Advanced Design

DEC 22nd, 2003

PURPOSE OF USING THE CMX882

The CMX882 handles all signal processing functions. It is capable of performing audio processing, as well as handling GPS information. It performs data packeting, and privacy encoding. All incoming and outgoing signals are processed by the CMX882.

DESCRIPTION OF CMX882

The CMX882 is a Radio Baseband Processor capable of handling both audio and GPS data information.

The following description was taken from the CMX882 datasheet:

"CMX882, a full-function half-duplex audio and signaling processor IC for FRS and PMR446 type facilities suitable for both complex and simple end-designs. Under the control of the host µC, all voiceband requirements are catered for: voiceband and sub-audio filtering, pre/de-emphasis, compression and expansion and audio routing and global level setting with single or two-point modulation in the transmit path.

The combination of new and standard signaling functions of this product offer, under software control, increased functionality, versatility and privacy. Standard Extended-Code CTCSS and DCS functions are integrated with the new XTCSS code implementation. XTCSS provides additional and improved squelch-centered privacy codes with the added advantage of ‘silent operation’; no annoying interference from other sub-audio users. XTCSS fitted radios enjoy more privacy and flexibility of operation.

For advanced and enhanced radio operation, the CMX882 embodies a 1200/2400 b/s free format and packet data FFSK/MSK modem (compatible with NMEA 0183) for Global Positioning by Satellite (GPS) operations.

With ultra low power requirements and graduated powersave, this product only requires a smaller, lower power µC than existing FRS/PMR446 solutions, is available in compact SSOP and TSSOP packages"(Baseband Processor for Leisure Radios - with Data, 2003, p. 2).

ACKNOWLEGEMENT

I would like to thank Fred Kostedt, Applications Engineer at CML Microcircuits (USA) Inc. for his timely response to all my questions.

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CORI KING – ENEE 498C

Contents

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CORI KING – ENEE 498C

STATE 0

PURPOSE OF USING THE CMX882

DESCRIPTION OF CMX882

ACKNOWLEGEMENT

STATE 0: POWERED-DOWN MODE

STATE A: RECIVING SIGNAL OR WAS ACTION INITIATED BY USER

STATE B: DETERMINING WHETHER PTT, POLL, OR MONITOR INITIATED

STATE 1: RX AUTO START UP & XTCSS RECEPTION

STATE 2: FFSK/MSK RECEPTION

STATE 3: VOICE RECEPTION

STATE 4: RETRANSMISSION REQUEST

STATE 5: FFSK/MSK TRANSMISSION

STATE 6: VOICE TRANSMISSION

STATE 7: REQUEST FOR GPS INFORMATION

STATE 8: MONITOR MODE

BIBLIOGRAPHY

STATE 0: POWERED-DOWN MODE

We begin in STATE 0, where are awaiting the arrival of a signal.

Load the following registers with the following bit sequences to accomplish this state:

Register
Name / Register Address / Register
Contents / Effect
Reset Command / 0000 0001 / NONE / Resets the chip, registers in known state.
SIGNAL ROUTING / 1011 0001 / 0000 0000 0001 0000 / MOD_1 & MOD_2 set to bias, analog I/P from INPUT_2, no audio output, Tx ramping don't care.
AUX. ADC THRESHOLD / 1011 0010 / 0010 0100 0000 0000 / ADC high threshold 703mVDC, low thresh. = 0
AUX. ADC CONTROL / 1011 0011 / 0000 0110 (8-bit reg.) / ADC input from SIG_MONITOR, conversion interval =125s.
POWER DOWN CTRL / 1100 0000 / 0000 0000 0101 0010 / Enabled: Bias, Prog Reg Save, AUX ADC. RX Auto Startup disabled to allow for writes to programming registers.
MODE CONTROL / 1100 0001 / 0110 1000 0001 0000 / Voice path disabled, XTCSS tones monitored, CTCSS tones monitored, FFSK/MSK 2400bps monitored, idle device mode.
INTERRUPT MASK / 1100 1110 / 1001 0010 0101 0001 / Enabled IRQs: XTCSS 4-tone set detection (or
completed transmission), Aux ADC High, FFSK/MSK Data Transfer required, Rx 2400b/s FFSK/MSK detection. Programming Flag bit (IRQ will be generated when it is permissible to write to the Programming Register).
The following program registers must be written to in this order.
PROG REG (P0.0) / 1100 1000 / 1100 1000 0010 0011 / FFSK/MSK pre/de-emphasis active, FFSK/MSK frame sync LSB=23h (default)
PROG REG (P0.1) / 1100 1000 / 0100 0000 1100 1011 / FFSK/MSK frame sync MSB=CBh (default)
PROG REG (P1.0) / 1100 1000 / 1101 0000 1111 1101 / Audio tone level=307.56mVp-p, Rx in-band de-emphasis enabled.
PROG REG (P1.1) / 1100 1000 / 0101 0100 0011 1001 / 60ms XTCSS tone length, XTCSS tone detection
threshold = 14.64mVp-p, +/-1.3% “will decode” bandwidth.
PROG REG (P2.0) / 1100 1000 / 1110 0000 0110 0110 / CTCSS Tx level = 31.11mVp-p
PROG REG (P2.1) / 1100 1000 / 0110 0001 0000 1000 / DCS 23-bit (“don’t’ care”), 9.76mVp-p CTCSS detection threshold, +/-1.1% CTCSS “will decode” bandwidth.
PROG REG (P4.0) / 1100 1000 / 1000 0000 0000 0000 / Fine Input Gain = 0dB.
PROG REG (P4.1) / 1100 1000 / 0000 0000 0000 0000 / Must write to this register in order to write to subsequent registers within Block 4.
PROG REG (P4.2) / 1100 1000 / 0000 0000 0000 0000 / Fine Output Gain 1 (affects MOD_1 output and Audio output) = 0dB.
PROG REG (P4.3) / 1100 1000 / 0000 0000 0000 0000 / Fine Output Gain 2 (affects MOD_1 output and Audio output) = 0dB.
PROG REG (P4.4) / 1100 1000 / 0000 0000 0000 0000 / MOD_1 output offset = 0mV (must write to this register due to need to write to other Block 4 registers).
PROG REG (P4.5) / 1100 1000 / 0000 0000 0000 0000 / MOD_2 output offset = 0mV (must write to this register due to need to write to other Block 4 registers).
PROG REG (P4.6) / 1100 0100 / 0000 0001 1000 0011 / Tx Ramp Up Control = Tx Ramp Down Control = 3 which corresponds to 5.3ms ramp time.
PROG REG (P4.7) / 1100 0100 / 0011 1111 1111 1111 / Transmit limiter set to allow maximum signal amplitude to pass without limiting.
end of program registers
POWER DOWN CTRL / 1100 0000 / 0000 0000 0101 0011 / Enabled: Bias, Prog Reg Save, Aux ADC, Rx Auto Startup.
time to load this section = 135.2 s

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CORI KING – ENEE 498C

STATE A

STATE A: RECIVING SIGNAL OR WAS ACTION INITIATED BY USER

A signal has arrived, BUT we don't know whether a signal is being automatically received or we whether we initiated action (PTT or POLL or MONITOR).

The Sig_Monitor only knows something is available.

An IRQ was sent because of the ADC high threshold being exceeded.

We need to find out which pin is receiving the input, i.e.

will the DISC pin input cause an IRQ = received signal, or

will the INPUT_2 pin cause an IRQ = POLL, PTT or MON.

Because of the biasing arrangement on the INPUT_2 buffer its output is approximately 2.5 V. This only changes when we activate PTT, POLL, or MONITOR. The voltage drops to less than 2 volts when one of the above mentioned buttons is activated.

Therefore we will be checking for a low ADC IRQ.

To check the INPUT_2 pin:

Load the following registers

Register
Name / Register
Address / Register
Contents / Effect
POWER DOWN CTRL / 1100 0000 / 1001 0000 0111 0000 / Enabled: Input_2, Input Gain, Bias, Signal Processing, Prog. Reg. Save.
AUX. ADC THRESHOLD / 1011 0010 / 0110 0110 0101 1101 / ADC high threshold 2.0VDC, low thresh. = 1.82VDC
AUX. ADC CONTROL / 1011 0011 / 0100 0110 (8 bit reg.) / ADC input from Input_2, conversion interval =125s.
POWER DOWN CTRL / 1100 0000 / 1001 0000 0111 0010 / Enabled: Input_2, Input Gain, Bias, Signal Processing, Prog. Reg. Save, AUX ADC.
MODE CONTROL / 1100 0001 / 0000 0000 0000 0000 / Idle mode (No Tx or Rx).
INTERRUPT MASK / 1100 1110 / 1000 0001 0000 0001 / Enabled IRQs: AUX ADC Low & Prog Flag.
time to load this section = 38.4s

An IRQ will only be generated if there is a value lower than 1.82 volts on INPUT_2. [If there is no IRQ, this means that our original IRQ way back in the beginning was from an incoming signal].

IF bit 8 (1000) of register 1100 0110 = 1 (reading of status register)

GOTO STATE B

ELSE

GOTO STATE 1

END

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CORI KING – ENEE 498C

STATE B

STATE B: DETERMINING WHETHER PTT, POLL, OR MONITOR INITIATED

The whole point of this state is to determine which button was pushed.

The voltage of the signal, which caused the IRQ, is stored in the AUX ADC MONITOR DATA ($B4) register.

This value will determine the state to which we proceed:

PTT range: 1.504 V  1.738 V

POLL range:1.210 V  1.406 V

MONITOR range:0.900 V  1.133 V

READ register 1011 0100 ($B4) (reading of AUX ADC MONITOR register)

IF bits 7-0 of register 1011 0100  0100 1101 (1.504 V) but 0101 1001 (1.738 V)

GOTO STATE 6

IF bits 7-0 of register 1011 0100  0011 1110 (1.210 V) but 0100 1000 (1.406 V)

GOTO STATE 7

IF bits 7-0 of register 1011 0100  0010 1110 (0.900 V) but 0011 1010 (1.133 V)

GOTO STATE 8

ELSE

GOTO STATE 0

END

If at any time during STATE 6 or STATE 8, the voltage on INPUT_2 rises above 2.0 volts the CMX882 should to return to STATE 0. This scenario corresponds to the release of the button that was pushed. For us, this means returning the DIP switch to its original position.

This scenario will be taken care of in the respective STATES.

STATE 7 will be handled slightly different.

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CORI KING – ENEE 498C

STATE 1

STATE 1: RX AUTO START UP & XTCSS RECEPTION

Load the following registers

Register
Name / Register
Address / Register
Contents /
Effect
SIGNAL ROUTING / 1011 0001 / 0000 0000 0011 0100 / MOD_1 & MOD_2 set to bias, analog I/P from DISC I/P, audio O/P = Received voice, Tx ramping “don’t cares”.
POWER DOWN CTRL / 1100 0000 / 0011 0000 0111 0000 / Enabled: Disc amp, Input Gain amp, BIAS, Signal Processing, and Prog Reg Save.
AUDIO & DEVICE ADDRESS CTRL / 1100 0010 / 0011 0100 0001 1110 / Companding enabled, 25.0kHz channel filtering, pre/deemphasis enabled, XTCSS address 30 selected.
MODE CONTROL / 1100 0001 / 0110 1000 0001 0001 / XTCSS tones monitored, CTCSS tones monitored, FFSK/MSK 2400bps monitored, Receive mode.
INTERRUPT MASK / 1100 1110 / 1001 1010 0001 1000 / Enabled IRQs: XTCSS 4-tone detection, CTCSS detection, Aux ADC High, Rx 2400bps and 1200bps FFSK/MSK.
time to load this section = 25.6 s

These settings will cause an IRQ to be generated; this will be reflected in the Status register. Since we are operating in Rx mode, we must verify that a valid XTCSS transmission is being received.

On reception of IRQ

IF bit 12 (1100) of register 1100 0110 = 1 (reading of status register)

READ register 1100 1001 ($C9) (reading of Rx data register)

IF bits 11-8 of register 1100 1001 = 1011(data or non-voice)

IF bits 15-12 of register 1100 1001 = 0010 (request for data retransmission)

GOTO STATE 5

IF bits 15-12 of register 1100 1001 = 0011(request for GPS data)

GOTO STATE 5

IF bits 15-12 of register 1100 1001 = 0110 (incoming FFSK/MSK)

WAIT 60ms

IF bits 10-8 of register 1100 1100 = 110 (reading of tone status register)

GOTO STATE 2

ELSE

GOTO STATE 0 (no maintenance tone)

ELSE

GOTO STATE 0 (error)

END

IF bits 11-8 of register 1100 1001 = 1100 (voice)

IF bits 15-12 of register 1100 1001 = 0001 (compressed voice)

WAIT 60ms

IF bits 10-8 of register 1100 1100 = 110 (reading of tone status register)

GOTO STATE 3

ELSE

GOTO STATE 0 (error)

ELSE

GOTO STATE 0 (error)

END

IF bits 11-8 of register 1100 1001  (1011 or 1100) (error)

GOTO STATE 0

END

ELSE

GOTO STATE 0

END

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CORI KING – ENEE 498C

STATE 2

STATE 2: FFSK/MSK RECEPTION

At this point, confirmation of a valid XTCSS signal has been received. We also know that we are receiving GPS data.

Load the following registers

Register
Name
/ Register
Address / Register
Contents / Effect
POWER DOWN CTRL / 1100 0000 / 0011 0000 0111 0000 / Enabled: Disc amp, Input Gain amp, BIAS, Signal Processing, & Prog. Reg. Save.
ANALOG GAIN / 1011 0000 / 0000 0000 0000 0000 / Enabled: Disc amp, Input Gain amp, BIAS, Signal Processing, & Prog. Reg. Save.
SIGNAL ROUTING / 1011 0001 / 0000 0000 0011 0000 / MOD_1 & MOD_2 outputs set to bias, analog input from DISC I/P, no input selected for audio output, no Tx ramp.
MODE CONTROL / 1100 0001 / 0000 1000 0001 0001 / CTCSS monitored, 2400b/s FFSK/MSK monitored, receive mode.
AUDIO & DEVICE ADDRESS CTRL / 1100 0010 / 0001 0100 1111 1111 / No companding, 25kHz channel spacing, pre/de-emphasis No companding, 25kHz channel spacing, pre/de-emphasis
MODEM CONTROL / 1100 0111 / 0000 0000 1010 0000 / Data packeting enabled, Type 5 FFSK/MSK message format, standard scrambling.
INTERRUPT MASK / 1100 1110 / 1000 1010 0101 0000 / Enabled IRQs: Rx CTCSS detection, Aux ADC High IRQ, FFSK/MSK data transfer ready, Rx 2400b/s detection
IRQ.
time to load this section = 44.8 s

The next event should be an IRQ to indicate a valid head frame. This should occur within 27 ms after arriving in this state, but we wait 30ms.

Create loop/timer for 30 ms

IF interrupt does not occurs within 30 ms (request for retransmission required)

GOTO STATE 4

IF interrupt occurs within 30ms

IF bit 5 (0101) of register 1100 0110 = 1(CRC block error - request for retransmission required)

GOTO STATE 4

IF bit 4 (0100) of register 1100 0110 = 1 (no errors)

READ data from registers 1100 0101 and 1100 1001

WHILE bit 6 (0110) of register of 1100 0110 = 1 and bit 7 (0111) of register 1100 0110 = 0

READ data from registers 1100 0101 and 1100 1001

IF bit 6 (0110) of register of 1100 0110 = 1 and bit 7 (0111) of register 1100 0110 = 1

READ data from registers 1100 0101 and 1100 1001

END

GOTO STATE 0 (reception finished, return to power down state)

ELSE

GOTO STATE 4 (frame head & CRC error)

END

END

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CORI KING – ENEE 498C

STATE 3

STATE 3: VOICE RECEPTION

An audible alerting tone (1250 Hz) will now be generated to alert the user to an incoming voice message.

Load the following registers

Register
Name / Register
Address / Register
Contents / Effect
AUDIO TONE / 1100 1101 / 0000 0100 1110 0010 / Loads 1250Hz tone for generation.
SIGNAL ROUTING / 1011 0001 / 0000 0000 0011 1000 / MOD_1 & MOD_2 outputs set to bias, analog input from DISC I/P, audio output=MOD_1 signal, no Tx ramping.
ANALOG GAIN / 1011 0000 / 0000 0000 0000 1111 / No inversion, MOD_1 & MOD_2 >40dB, Input Gain=0dB, Audio Output=0dB
MODE CONTROL / 1100 0001 / 0001 1000 0000 0001 / Voice path disabled, Audio Tone Generation enabled, CTCSS monitored, Receive mode.
POWER DOWN CTRL / 1100 0000 / 0011 1000 1111 0000 / Enabled: Disc amp, Input Gain amp, O/P Fine Gain 1, Audio Output amp, BIAS, Signal Processing (allows Status Register contents to be valid), Prog Reg Save.
time to load this section = 32 s

We want the alert tone to last for 500ms. Since the alert tone will be disable by the loading of the next section we will wait for 500ms before loading the next section.

Once we load the next section all steps are complete for voice processing.

Wait 500ms, then

Load the following registers

Register
Name / Register
Address / Register
Contents / Effect
MODE CONTROL / 1100 0001 / 1000 1000 0000 0001 / Voice path enabled, CTCSS monitored, Receive mode.
SIGNAL ROUTING / 1011 0001 / 0000 0000 0011 0100 / MOD_1 & MOD_2 outputs set to bias, analog input from DISC I/P, audio output=Received Voice signal, no Tx ramping.
time to load this section = 12.8 s

When the voice transmission has ended, an IRQ will occur.

This IRQ is the result of the maintenance tone also ending. This is reflected both in the status register ($C6) and the tone status register ($CC).

When IRQ occurs

IF bit 11 (1011) of register 1100 0110 = 1 AND bits 10-8 of register 1100 1100 = 000

GOTO STATE 0(reading of status and tone status register)

END

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CORI KING – ENEE 498C

STATE 4

STATE 4: RETRANSMISSION REQUEST

The CMX882 is now in the state for requesting a retransmission (from STATE 2).

Load the following registers

Register
Name / Register Address / Register
Contents / Effect
(preparation for XTCSS transmission)
ANALOG GAIN / 1011 0000 / 0111 0111 0000 0000 / MOD_1 set to 0dB, MOD_2 set to 0dB.
SIGNAL ROUTING / 1011 0001 / 0001 0000 0000 0011 / Tx signal to MOD_1, Tx sub-audio signal to MOD_2, Tx ramp up and ramp down enabled.
POWER DOWN CTRL / 1100 0000 / 0000 1111 0111 0000 / Enabled: O/P Fine Gain 1, O/P Fine Gain 2, O/P Coarse Gain 1, O/P Coarse Gain 2, BIAS, Signal Processing, Prog Reg Save.
AUDIO & DEVICE CTRL / 1100 0010 / 0011 0110 0001 0100 / Companding enabled, 25.0kHz channel filtering, pre/de-emphasis enabled, XTCSS maintenance tone enabled, XTCSS address 20 loaded.
(XTCSS transmission indicating retransmission request)
XTCSS CODE / 1100 1011 / 0010 1011 0000 0000 / S1=2h, S0=Bh (indicates retransmission request).
INTERRUPT MASK / 1100 1110 / 1001 0000 0000 0000 / Enabled IRQs: XTCSS 4-tone set transmission completion.
MODE CONTROL / 1100 0001 / 0110 0000 0000 0010 / Enable XTCSS transmission, Transmit Mode.
time to load this section = 44.8 s

Once this is done, transmission of the XTCSS 4 tone sequence will begin automatically. An IRQ will be generated at the end of the XTCSS transmission. After this IRQ, the CMX882 should return to STATE 0, and await reception of retransmission.

When IRQ occurs

IF bit 12 (1100) of register 1100 0110 = 1(in fact this is the only IRQ that can occur)

GOTO STATE 0

END

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CORI KING – ENEE 498C

STATE 5

STATE 5: FFSK/MSK TRANSMISSION

We are answering a request for GPS info or for retransmission.

Therefore must prepare to send info:

Load the following registers

Register
Name / Register Address / Register
Contents / Effect
(preparation for XTCSS transmission)
ANALOG GAIN / 1011 0000 / 0111 0111 0000 0000 / MOD_1 set to 0dB, MOD_2 set to 0dB.
SIGNAL ROUTING / 1011 0001 / 0001 0000 0000 0011 / Tx signal to MOD_1, Tx sub-audio signal to MOD_2, Tx ramp up and ramp down enabled.
POWER DOWN CTRL / 1100 0000 / 0000 1111 0111 0000 / Enabled: O/P Fine Gain 1, O/P Fine Gain 2, O/P Coarse Gain 1, O/P Coarse Gain 2, BIAS, Signal Processing, Prog Reg Save.
AUDIO & DEVICE CTRL / 1100 0010 / 0011 0110 0001 0100 / Companding enabled, 25.0kHz channel filtering, pre/de-emphasis enabled, XTCSS maintenance tone enabled, XTCSS address 20 loaded.
(XTCSS transmission indicating data to follow)
XTCSS CODE / 1100 1011 / 0110 1011 0000 0000 / S1=6h, S0=Bh (indicates data to follow).
INTERRUPT MASK / 1100 1110 / 1001 0000 1000 0000 / Enabled IRQs: XTCSS 4-tone set transmission completion, FFSK/MSK data transmission completion.
MODE CONTROL / 1100 0001 / 0110 1000 0000 0010 / Enable XTCSS transmission, enable CTCSS transmission and Transmit Mode.
time to load this section = 44.8 s

Once the registers are loaded, transmission of the XTCSS 4 tone sequence will begin automatically.

An IRQ will be generated at the end of the XTCSS transmission.

The CTCSS maintenance tone will begin transmitting at this time.

Micro-controller should then wait one XTCSS tone period (60 ms for us) after the XTCSS transmission, before FFSK/MSK transmitting.

When IRQ occurs

IF bit 12 (1100) of register 1100 0110 = 1

WAIT 60 ms

Load the following registers

Register
Name / Register Address / Register Contents / Effect
INTERRUPT MASK / 1100 1110 / 1000 0000 1000 0000 / Enabled IRQs: FFSK/MSK data transmission completion.
MODEM CONTROL / 1100 0111 / 0000 0000 1010 0000 / Formatted data packetizing, Type 5 message format, standard scramble seed.
TX DATA (Data Bytes 0 & 1) / 1100 1010 / 1111 1111 0000 1110 / FFSK/MSK address = 255,14 byte frame length.
TX DATA (Data Bytes 3 & 4) / 1100 1011 / your data = 16bits/2 bytes / Data to be transmitted.
MODE CONTROL / 1100 0001 / 0110 0000 0001 0010 / XTCSS transmission already active, transmit FFSK/MSK data at 2400bps.
time to load this section = 32 s

First the bit and frame sync patterns, which are stored in the Programming Register, will be transmitted. Then the contents of $CA and $CB respectively.

An IRQ will occur will the final bit is transmitted.

When IRQ occurs

IF bit 7 (0111) of register 1100 0110 = 1(in fact this is the only IRQ that can occur)

GOTO STATE 0

END

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CORI KING – ENEE 498C

STATE 6

STATE 6: VOICE TRANSMISSION

When the PTT (Push-To-Talk) button is pressed, a tone is generated.

Tone equals 2000 Hz and lasts for 500ms.

When the PTT button is released, this state should terminate and return to STATE 0.

This will be indicated by an IRQ occurring due to the high threshold (2.0 VDC) being exceeded.

For us, this means returning the DIP switch to its original position.

While bit 9 (1001) of register 1100 0110 = 0 (reading of status register)

Do the following

Load the following registers

Register
Name / Register Address / Register Contents / Effect
AUDIO TONE / 1100 1101 / 0000 0111 1101 0000 / Loads 2000 Hz tone for generation.
SIGNAL ROUTING / 1011 0001 / 0000 0000 0011 1000 / MOD_1 & MOD_2 outputs set to bias, analog input from DISC I/P, audio output=MOD_1 signal, no Tx ramping.
ANALOG GAIN / 1011 0000 / 0000 0000 0000 1111 / No inversion, MOD_1 & MOD_2 >40dB, Input Gain=0dB, Audio Output=0dB.
MODE CONTROL / 1100 0001 / 0001 1000 0000 0001 / Voice path disabled, Audio Tone Generation enabled, CTCSS monitored, Receive mode.
POWER DOWN CTRL / 1100 0000 / 0011 1000 1111 0010 / Enabled: Disc amp, Input Gain amp, O/P Fine Gain 1, Audio Output amp, BIAS, Signal Processing (allows Status Register contents to be valid), Prog Reg Save & Aux ADC.
time to load this section = 32 s

Wait 500ms, then