Dependency of Oxide Thickness Effect on the Evolution of n-MOSFET Switching Time with Electrical Stress

C. SALAME 1, R. HABCHI 1, 2, B. NSOULI 3, A. KHOURY 1, and P. MIALHE 2

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1CEA-LPSE, Faculty of Sciences II, Lebanese University, 90656 Jdeidet El Mten, Lebanon

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2LP2A, Université de Perpignan, 52 av de Paul Alduy, 66860 Peprignan cedex, France

3Lebanese Atomic Energy Commission , airport highway, P.O. Box 11-8281, Beirut, Lebanon

Abstract

In this work, the oxide thickness effects on the switching times of COTS (Cost On The Shelf) n-MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistor) power devices were investigated. A thick oxide reveals a large accumulation of positive charges, whereas the effect of the hot electrons, which cross the Si/SiO2 interface and cause the positive charges, is reduced in thinner oxides. In this study, we show that interface states are the major signs of degradation in thin oxide devices. The measurements performed show the variation of switching times, along with the saturation current in the channel, for three different oxide thicknesses.

Keywords: MOSFET, switching time, electrical stress, oxide effect

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Introduction

The gate insulator in MOS (Metal-Oxide-Semiconductor) structures, formed by a silicon dioxide layer, is subjected to a high electric field during operation [1-3]. This stress causes many detrimental physical effects such as the trapping of charges in the oxide bulk, creation of interface states [4,5], and eventually, breakdown [6,7]. These phenomena affect the MOS characteristics and lead to the degradation of MOS parameters [8,9]. It has generally been believed that the intrinsic oxide properties, such as breakdown strength and charge to breakdown, improve as thickness is reduced [10,11]. The reason was attributed to the fact that for thinner oxides, rather than Fowler-Nordheim tunneling, direct tunneling dominates, which involves less energetic electrons or holes causing lesser damage [12]. Because the operation of these devices is based on the passage of a tunneling current through an oxide layer, the oxide thickness t(ox) is an important parameter determining the performance of the transistor in various aspects [13]. In this paper, current waveforms during MOSFET switching were investigated. Results are given for three different devices with three different oxide thicknesses.

Experimental set-up

The type of stress technique used in this study is constant-voltage stress. The gate electrode is positively polarized, and drains and source electrodes are grounded. Stress voltage is chosen for each device to be the maximum tension that could be reached before breakdown. Switching times were measured by applying a square signal on the gate electrode and by monitoring current and voltage waveforms between drain and source. All measurements were performed at room temperature, so all the variations observed are the effects of the different oxide thicknesses.

Experimental results and discussion

To show the dependence of oxide thickness on the evolution of MOS characteristics with electrical stress, several measurements were performed on three different types of commercial n-VDMOSFETs (Vertically Diffused MOSFETs). The first one was an IRF520 with a gate-to-source maximum voltage of 20 V, the second was an IRL3215 with a gate-to-source maximum voltage of 16 V, and the third was an IRLZ14 with a gate-to-source maximum voltage of 10 V. The second device has a thinner oxide bulk than the first one, and the third has a thinner oxide than the second one.

The evolution of switching characteristics is evaluated in this study. The variation of the rise time Tr of the three devices is shown in figure 1. For the IRF520, the rise time is shown to be increasing at the first period of stress, indicating a positive charge accumulation in the oxide bulk. The accumulated positive charge leads to a larger channel that increases the time needed to fill it with electrons. Then, after longer periods of stress, interface degradation becomes dominant and Tr begins to stabilize. For IRL3215 and IRLZ14, the initial increasing is not observed. This means that in thinner oxide, positive charge accumulation is observed less. Transport in thin oxides is ballistic, which means that most of the electron energy is released at the electrode and not in the oxide bulk. In this case, the principal defects are created at the interface region were negative charges are accumulated, leading to the formation of a permanent channel that is revealed by a drain-source leakage current, even with no gate polarization, after 100 minutes of stress for IRL3215 and after 30 minutes for IRLZ14.

Figure 1. Rise time Tr of three different devices with different evolution of oxide thicknesses versus stress time.

The fall time Tf represented in figure 2 also indicates that not much oxide charge accumulation is observed in thin oxides. For IRL3215 and IRLZ14, Tf begins to increase at the first moments of degradation, and measurements do not reveal physical evidence of an oxide positive charge. Td(on) is the time needed to switch the device from its off-state to the on-state. This parameter indicates how fast the device’s reaction to being turned on is. Td(off) is the reaction time of the device at switching from on-state to off-state.

Figure 2. Fall time Tr of three different devices with different oxide thicknesses.

Figures 3 and 4 show the Td(on) and Td(off) delay times that correspond to the charge and discharge of the built-in gate-channel capacity.

Variations of both Td(on) and Td(off) indicate a large accumulation of positive charges in thick oxide (IRF520) and a creation of interface states with no charge accumulation in thinner oxide (IRL3215 and IRLZ14). Td(on) increases for thick oxide during the first 30 minutes of stress, before it starts to descend, however; it begins to decrease from the start in thin oxides. The accumulated positive charge represents an additional polarization to the gate. Therefore, an additional negative charge will be needed in the channel to fully charge the gate-channel capacity, so the result is a larger Td(on) value when the oxide is positively charged. But when negatively charged interfacial states are dominating, Td(on) decreases because of the channel’s negative charge. Td(off) decreases when oxide charge is positive because evacuation of electrons become faster with the additional positive polarization.


Figure 3. Td(on) delay time of three different devices with different oxide thicknesses. /
Figure 4. Td (off) delay time of three different devices with different oxide thicknesses.

The most essential transistor characteristic, the current-voltage (I-V) curve, was also measured. The saturation current is shown to increase at the first moments of stress, and then begins to decrease. For the thick oxide, the accumulated charge that enlarged the channel made the saturation current become larger, whereas in the thin oxide, the intensity of the phenomenon was not at the same scale, indicating that positive charge accumulation in the oxide bulk is not as severe in thin oxide as it was in the thicker one. Figure 5 shows the saturation-current evolution versus stress time. This variation indicates considerable interface degradation due to electron trapping in the channel at the interface region for the IRL3215 and IRLZ14. In IRF520, the channel’s conduction conditions become better when maximum oxide positive charge is reached. This is the effect of the enlarged channel.

Figure 5. Saturation current evolution versus stress time.

Conclusion

The results treated in this paper clearly show that thin oxide layers are less vulnerable to energy deposition because ionizing charges travel a smaller distance through the gate region, leading to a reduced transfer of energy to the oxide molecules. Tr and Tf variations indicate a large creation of traps and defects, generating a built up of oxide positive charge that accelerates degradation in thick oxides, while in thin oxide layers, the major type of defects is the interfacial states creation. The Td(on) variation shows that the device’s response at the on-state switching is becoming faster in thin oxides, which is a good benefit that could be obtained by an electrical stress treatment. The Td(off) variation doesn’t show great benefits for thin oxides. Only the device with thick oxide gains benefits from the stress treatment. The saturation current does not vary considerably with stressed thin oxides, whereas for the thick oxide device, the saturation current is largely increasing for certain amounts of stress. This result demonstrates that the channel’s conduction could be amplified with appropriate stress amounts for some particular devices with enough oxide thickness. So, in general, it could be concluded that reducing oxide thickness is a possible solution for device hardening, specially that the major defect in COTS materials is the large oxide accumulation in hostile environments operations. It could be stated that thin oxides are less susceptible to energy deposition by hot electrons, so this property could be used, along with better interfacial regions, to produce a better generation of devices that could handle long-time operation in severe conditions.

Acknowledgement

We would like to thank the Public Affairs Office of the United States embassy in Beirut for their help and support to contribute.

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