SEMI Draft Document 4209

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SEMI Draft Document 4209

New Preliminary Standard - PRACTICE FOR DETERMINING WAFER NEAR-EDGE GEOMETRY FROM A MEASURED HEIGHT DATA ARRAYUSING A CURVATURE METRIC, ZDD

Background Statement

Note: This background statement is not part of the draft Preliminary Standard. It is provided solely to assist the recipient in reaching an informed decision based on the rationale of the activity that preceded the creation of this document.

Note: Recipients of this document are invited to submit, with their comments, notification of any relevant patented technology or copyrighted items of which they are aware and to provide supporting documentation. In this context, “patented technology” is defined as technology for which a patent has been issued or has been applied for. In the latter case, only publicly available information on the contents of the patent application is to be provided.

The work on this document began with a SNARF submitted by Noel Poduje of ADE Corporation, submitted and approved on July 13, 2005.

Several presentations describing the ZDD metric have been made by ADE to the AWG Task Force. The first draft document was presented to the AWG Task Force at SEMICON-West 2005. Drafts with revisions were generated and discussed at subsequent AWG Task Force meetings. See meeting minutes attachments for these drafts. The present draft, to be reviewed at the AWG Task Force meeting at SEMICON-Japan, December 7, 2006, is a product of the AWG Task Force meeting at the NA Standards Meetings in Portland, OROctober 16, 2006.

SEMI Draft Document 4209

New Preliminary Standard - PRACTICE FOR DETERMINING WAFER NEAR-EDGE GEOMETRY FROM A MEASURED HEIGHT DATA ARRAY USING A CURVATUREMETRIC, ZDD

1 Purpose

1.1 Wafer near-edge geometry can significantly affect the yield of semiconductor device processing.

1.2 Knowledge of near-edge geometrical properties can help the producer and consumer determine if the dimensional characteristics of a specimen wafer satisfy given geometrical requirements.

1.3 The metric, ZDD, quantifies the near-edge curvature of wafers used in semiconductor device processing.

1.4 Consideration should be given to the use of this or other proposed near-edge geometry metrics as a process control tool rather than a material exchange specification.

2 Scope

2.1 This practice covers calculation of near-edge curvature ZDD (radial double derivative of z (height)).

2.2 The metric calculated by this practice is based on a height data array; either a single surface (front or back) or thickness.

2.3 This practice is suitable for polished, epitaxial, SOI, or other layer condition

2.4 The practice is applicable to notched 200mm and 300mm diameter wafers having dimensions in accordance with wafer categories 1.9.2 and 1.15 of SEMI M1.

2.5 This practice does not cover acquisition of the height data array. However, it gives the required characteristics of the height data array.

NOTICE: This standard does not purport to address safety issues, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory or other limitations prior to use.

3 Limitations

3.1 Deficiencies of data such as inadequate spatial resolution, mispositioning, noise, etc. in the height data array used to calculate the metrics may lead to erroneous results.

3.2 Noise of the ZDD calculation may be affected by the height data array spacing and the details of the sector averaging and the differentiation method for curvature.

4Referenced Standards

4.1SEMI Standards

SEMI M1 — Specifications for Polished Monocrystalline Silicon Wafers

SEMI M20 — Practice for Establishing a Wafer Coordinate System

SEMI M59 — Terminology for Silicon Technology

NOTICE: Unless otherwise indicated, all documents cited shall be the latest published versions.

5 Terminology

5.1General terms, acronyms, and symbols used in silicon wafer technology are listed and defined in SEMI M59.

5.1.1 Other Definitions

5.1.2edge roll off (ERO) — surface deviations of a large-diameter silicon wafer near the edge, but excluding effects due to wafer edge profiling.

5.1.3near-edge geometry — the flatness of the top surface of a large diameter silicon wafer in the outer region of the fixed quality area (FQA).

6Summary of Practice

6.1Sectors for calculation of ZDD are defined by FQA radius and sector angular extent. Required exclusions are defined.

6.2A height data array is acquired.

6.3ZDD reporting radii are defined.

6.4ZDD(r) for each sector is calculated.

6.5 Recipe parameters are reported.

6.6ZDD is reported at the reporting radii for each sector and surface(s) analyzed.

6.7 Statistical quantities for ZDD are also calculated and reported for each wafer.

7Apparatus

7.1Measuring Equipment, suitable for acquiring the height data array and transferring it to the calculation equipment. A test method for acquiring the height data array is not covered in this document.

7.1.1The equipment shall perform all necessary calculations and corrections needed to produce the height data array internally and automatically, including instrument-dependent exclusion areas. The equipment shall be equipped with a means of detecting and either deleting or identifying invalid data (over-range signal).

7.1.2Height resolution shall be 1nm or smaller.

7.1.3Height data array data point spacing shall be 0.5 mm or less in two orthogonal directions in the plane of the wafer.

7.1.4 The acquisition spatial resolution shall be appropriate for the height data array data point spacing and shall be agreed upon between the parties of the test.

7.1.5The height data array must cover the wafer surface including the entire FQA boundary (except in exclusion areas).

7.1.6Calculation Software, to perform the calculations of this practice and to provide outputs of the results, including statistical parameters as agreed upon by the parties to the test.

8 Procedure

8.1Select the fixed quality area (FQA) by specifying the nominal edge exclusion EE. The FQA radius, RFQA = RNOM – EE where RNOM is the nominal radius of the wafer (e.g., 100 mm or 150 mm).

8.2 Select the number of sectors, N, which defines a sector span, S=360/N. where S is in degrees.

8.3Define r1...rn as the radii for reporting of ZDD.

8.4 Determine statistics to be reported for each wafer. As a minimum, these shall include maximum, average, range, standard deviation, and 95thpercentile.

8.5 Acquire the height data array in accordance with a method agreed upon by all parties to the practice.

9 Calculations

NOTE 1: The following calculations are performed automatically within the equipment. An outline of the calculation structures is provided here to indicate the nature of the procedure.

NOTE 2: Alternative calculation of sector average profile from the height data array, giving comparable results, may be used. Data at sector boundaries is generated using interpolation techniques. This may result in use of height data outside the FQA boundary. Alternatively, for this boundary, an extrapolation technique may be used.

9.1 Divide the wafer surface into N sectors, S1 to SN as follows (see Figure 1):

9.1.1 Place the outer boundary of the sectors at a radius Ro = RFQA. (see 8.1.1).

9.1.2 Place the counter-clockwise lateral boundary of a sector Si is at CCi = (i – 1)S+ S/2.

9.1.3 Place the clockwise lateral boundary of a sector Si is at Ci= (i – 1)S– S/2.

9.2 For each sector,

9.2.1 Interpolate values from the height data array onto a polar grid having data point spacing consistent with 7.1.3 which includes the sector boundaries.

9.2.2 Calculate a sector average radial profile from the polar grid by averaging all the data within the sector and on its boundaries at each radius.

9.2.3 Calculate ZDD(r) as the second derivative with respect to radius of the sector average radial profile.

9.3 Record ZDD(r1 ... rn).

9.4 Calculate statistics, including all quantities agreed to by the parties to the test, at each radius (r1 ... rn) for each wafer using ZDD for each sector on the wafer.

9.5 For multi-measurement tests, calculate the standard deviations of each set of wafer measurements and such other statistical parameters as agreed to by the parties to the test.

10 Report

10.1 Report the following information:

10.1.1 Date, time of test,

10.1.2 Identification of operator,

10.1.3 Location (laboratory) of test,

10.1.4 Identification of measuring instruments, including measuring equipment and calculation equipment (identification of make, model, software version, etc.),

10.1.5 Acquisition Spatial Resolution and data point spacing,

10.1.6Lot identification and wafer identification,

10.1.7 Description of sampling plan, if any,

10.1.8

10.1.9FQA diameter,

10.1.10 Sector angle, S, and

10.1.11 Data for each wafer measured, as follows:

10.1.11.1 ZDD(r1 ... rn), per sector for radii r1 ...rn

10.1.11.2 Statistics at each radius (r1 ... rn) per wafer (e.g., average, range, standard deviation, other, as agreed).

10.2 For multi-measurement tests, report the standard deviation of each set of wafer measurements and such other statistical parameters as agreed to by the parties to the test.

Figure 1
Illustration of Sectors

11Keywords

11.1ERO; ZDD; curvature, near-edge geometry; semiconductor; silicon; wafer

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