Rev / ECO / Description / Author / Approved / Date
01 / xx-xxx / Initial Release for comment / WBrys / 11/18/09
02 / Corrections for two 32bit inputs.
Specified IO connectors / WBrys / 12/01/09
03 / Corrections / WBrys / 12/07/09
04 / New number , new timing for PC data recorder / 01/26/10

IO MODULE

Specification

Dwg. No.52-02001_rev04.doc

November 18, 2009

“IO MODULE”

Description of the Interface module.

“IO MODULE” is an interface module, to interconnect and transmit data from the detector module (ADC module) totheWFF93 PCM Encoder, through Parallel Digital Input deck and totheData Recorder (PC based data recorder).

Scope

This document describes the data interface circuit - “IO MODULE” - between detector module and Parallel Digital Input decks (WFF93 PCM Encoder) and a Data Recorder (PC based).

The telemetry system will employ two independent detectors:

-IMAGER

-SPECTROGRAPH

There will be two identical “IO modules”, one for each detector, interconnecting to two Parallel Digital Input decks. Signal interfaces are identical for both detectors – the same signal structure, the same connectors.

Ground (GND) connections: proposed to eliminate all GND connections from the cables, except power cable: this will be the only connection to GND.

Figure 1 is a block diagram of the “IO MODULE”and its interfaces.

Interface description:

There are 4 external interfaces to the “IO MODULE” module. (Ref figure 1.)

  1. Interface to a detector / ADC converter module.

Input data: three words of information(value X, value Y and value P), in binary format. Data transfer is controlled by 2 hand-shake signals: DAV and GOTIT. See Fig 2 for detail timing diagram.Signals from detector are provided on 3 connectors DB25P.

  1. Pin assignments for the X, Y and P connectors are listed in tables 1-3.
  2. Table 1 shows pinout for connector Y (value Y, 12 bits)
  3. Table 2 shows pinout for connector X (value X, 12 bits)
  4. Table 3 shows pinout for connector P (value P, 8 bits)

Connector type:

(P) pins on detector ADC module

(S) socket on the interconnecting cable

  1. Control signals

Timing diagram for control signals DAV (/REQ) and GOTIT (/ACK) is provided in figure 2.

???=Will DAV always go high after GOTIT pulse? (Edge mode)

Is it possible that after GOTIT active DAV will stay low, because there is another data ready? (Level mode)

  1. Interconnecting cable:

Three DB25S to one DC37 S. Refer Fig 5 for additional details.

Detail pinout in Table 4.

-No GND connections in the cable.

TABLE 1
Connector DB25 “Y”
Pin# / SIGNAL / notes
1 / GND
2 / GND
3 / GND
4 / GND
5 / GND
6 / Y2 / nc / Not used
7 / Y3 / nc / Not used
8 / Y4 / D0 (LSB)
9 / Y5 / D1
10 / Y6 / D2
11 / Y7 / D3
12 / Y8 / D4
13 / Y9 / D5
14 / Y15 / D11 (MSB)
15 / Y10 / D6
16 / Y14 / D10
17 / Y11 / D7
18 / Y1 / nc / Not used
19 / Y12 / D8
20 / Y0 / nc / Not used
21 / Y13 / D9
22 / nc
23 / DAV / /REQ / Active low
24 / GND
25 / /GOTIT / /ACK / Active low, tw>100ns
TABLE 2
Connector DB25 “X”
Pin# / SIGNAL / notes
1 / GND
2 / GND
3 / GND
4 / GND
5 / GND
6 / X2 / nc / Not used
7 / X3 / nc / Not used
8 / X4 / D12 (LSB)
9 / X5 / D13
10 / X6 / D14
11 / X7 / D15
12 / X8 / D16
13 / X9 / D17
14 / X15 / D23 (MSB)
15 / X10 / D18
16 / X14 / D22
17 / X11 / D19
18 / X1 / nc / Not used
19 / X12 / D20
20 / X0 / nc / Not used
21 / X13 / D21
22 / nc
23 / DAV / /REQ / Active low
24 / GND
25 / /GOTIT / /ACK / Active low, tw>100ns
TABLE 3
Connector DB25 “P”
Pin# / SIGNAL / notes
1 / GND
2 / GND
3 / GND
4 / GND
5 / GND
6 / P2 / nc / Not used
7 / P3 / nc / Not used
8 / P4 / nc / Not used
9 / P5 / nc / Not used
10 / P6 / nc / Not used
11 / P7 / nc / Not used
12 / P8 / D24 (LSB)
13 / P9 / D25
14 / P15 / D31 (MSB)
15 / P10 / D26
16 / P14 / D30
17 / P11 / D27
18 / P1 / nc / Not used
19 / P12 / D28
20 / P0 / nc / Not used
21 / P13 / D29
22 / nc
23 / DAV / /REQ / Active low
24 / GND
25 / /GOTIT / /ACK / Active low, tw>100ns
TABLE 4
Cable from ADC converter (three DB25S, Y, X, P) to MODULE (DC37S)
Ref Tables 1-3
Connector / DB25S / DC37S
X, Y, P / PIN# / Signal
IO Module / PIN# / Notes
Y, X, P / 1-5, 24 / GND / GND / 1 / NC
Y / 8 / Y4 / In0 / 2
Y / 9 / Y5 / In1 / 3
Y / 10 / Y6 / In2 / 4
Y / 11 / Y7 / In 3 / 5
Y / 12 / Y8 / In 4 / 6
Y / 13 / Y9 / In 5 / 7
Y / 15 / Y10 / In 6 / 8
Y / 17 / Y11 / In 7 / 9
Y / 19 / Y12 / In 8 / 10
Y / 21 / Y13 / In 9 / 11
Y / 16 / Y14 / In10 / 12
Y / 14 / Y15 / In 11 / 13
X / 8 / X4 / In12 / 14
X / 9 / X5 / In13 / 15
X / 10 / X6 / In14 / 16
X / 11 / X7 / In15 / 17
X / 12 / X8 / In16 / 18
Y, X, P / 1-5, 24 / GND / GND / 19 / NC
X / 13 / X9 / In17 / 20
X / 15 / X10 / In18 / 21
X / 17 / X11 / In19 / 22
X8 / 19 / X12 / In20 / 23
X9 / 21 / X13 / In21 / 24
X10 / 16 / X14 / In22 / 25
X11 / 14 / X15 / In23 / 26
P / 12 / P8 / In24 / 27
P / 13 / P9 / In25 / 28
P / 15 / P10 / In26 / 29
P / 17 / P11 / In27 / 30 / 37, 38, 39
P / 19 / P12 / In28 / 31
P / 21 / P13 / In29 / 32
P / 16 / P14 / In30 / 33
P / 14 / P15 / In31 / 34
Y, X, P / 1-5, 24 / GND / GND / 35 / NC
Y, X, P / 23 / /DAV / 36 / Active LOW
Y, X, P / 25 / /GOTIT / 37 / Active LOW
  1. Interface to PCM Encoder –Parallel Digital Input deck: Port 1 and Port 2.

WFF93 PCM Encoder contains the Parallel Digital Input deck: it is a parallel interface module, with two independent, 16 bit data buses (total 32 bits)each with dedicated Read Strobe signals. Figure 2 shows a typical switching waveform for one of the 16 bit buses.

Leading edge of the Read Strobe is used to signal the “user” to set up the parallel data. The parallel data is read/latched into the Encoder on the trailing edge of the Read strobe.

IO MODULE will provide the data with tds100ns and tdh>5ns.

Interconnecting cable from IO MODULE and WFF93 Encoder: see TABLE 5.

TABLE 5
Cable from IO module to WFF93 Encoder
Detector ID / DC37P / AirBorn WTB40PR7J. / Notes
Y, X, P / Pin# / Signal
IO Module / Signal on WFF93 / Pin#
1 / GND / Digital Ground / 27 / NC
Y0 / 2 / D0 / Port 1, Bit 16 In / 26 / LSB
Y1 / 3 / D1 / Port 1, Bit 15 In / 25 /
Y2 / 4 / D2 / Port 1, Bit 14 In / 24
Y3 / 5 / D3 / Port 1, Bit 13 In / 23
Y4 / 6 / D4 / Port 1, Bit 12 In / 22
Y5 / 7 / D5 / Port 1, Bit 11 In / 21
Y6 / 8 / D6 / Port 1, Bit 10 In / 10
Y7 / 9 / D7 / Port 1, Bit 9 In / 9
Y8 / 10 / D8 / Port 1, Bit 8 In / 8
Y9 / 11 / D9 / Port 1, Bit 7 In / 7
Y10 / 12 / D10 / Port 1, Bit 6 In / 6
Y11 / 13 / D11 / Port 1, Bit 5 In / 5 / MSB
X0 / 14 / D12 / Port 1, Bit 4 In / 4 / LSB
X1 / 15 / D13 / Port 1, Bit 3 In / 3 /
X2 / 16 / D14 / Port 1, Bit 2 In / 2
X3 / 17 / D15 / Port 1, Bit 1 In / 1
18 / RD 1 / Port 1 Rd Strb / 30
19 / GND / Digital Ground / 37 / NC
X4 / 20 / D16 / Port 2, Bit 16 In / 36
X5 / 21 / D17 / Port 2, Bit 15 In / 35
X6 / 22 / D18 / Port 2, Bit 14 In / 34
X7 / 23 / D19 / Port 2, Bit 13 In / 33
X8 / 24 / D20 / Port 2, Bit 12 In / 32
X9 / 25 / D21 / Port 2, Bit 11 In / 31
X10 / 26 / D22 / Port 2, Bit 10 In / 20
X11 / 27 / D23 / Port 2, Bit 9 In / 19 / MSB
28 / GND / Digital Ground / 38 / NC
P0 / 29 / D24 / Port 2, Bit 8 In / 18 / LSB
P1 / 30 / D25 / Port 2, Bit 7 In / 17
P2 / 31 / D26 / Port 2, Bit 6 In / 16
P3 / 32 / D27 / Port 2, Bit 5 In / 15
P4 / 33 / D28 / Port 2, Bit 4 In / 14
P5 / 34 / D29 / Port 2, Bit 3 In / 13
P6 / 35 / D30 / Port 2, Bit 2 In / 12
P7 / 36 / D31 / Port 2, Bit 1 In / 11 / MSB
37 / RD 2 / Port 2 Rd Strb / 40

The pin assignments for the Parallel Digital Input deck’s J1 connector are listed in Table 6. Signalsin Port 1 are highlighted. There are 2 independent, parallel buses, Port 1 and Port 2. Port 1 will be used to transfer LOWER part of the digital information for value X, value Y and value P. Port 2 will be used to transfer UPPER part of the digital information for value X, value Y and value P.A detailed description of signal assignments and data structure can be found in below.

The Parallel Digital Input deck’s I/O interface connector is a 40-contact AirBorn, P/N WTB40PR7J.

TABLE 6
Pin assignments for the Parallel Digital Input deck’s J1 connector
Pin# / Function / Pin# / Function
1 / Port 1, Bit 1 In MSB / 21 / Port 1, Bit 11 In
2 / Port 1, Bit 2 In / 22 / Port 1, Bit 12 In
3 / Port 1, Bit 3 In / 23 / Port 1, Bit 13 In
4 / Port 1, Bit 4 In / 24 / Port 1, Bit 14 In
5 / Port 1, Bit 5 In / 25 / Port 1, Bit 15 In
6 / Port 1, Bit 6 In / 26 / Port 1, Bit 16 In LSB
7 / Port 1, Bit 7 In / 27 / Digital Ground
8 / Port 1, Bit 8 In / 28 / Digital Ground
9 / Port 1, Bit 9 In / 29 / Digital Ground
10 / Port 1, Bit 10 In / 30 / Port 1 Rd Strobe
11 / Port 2, Bit 1 In MSB / 31 / Port 2, Bit 11 In
12 / Port 2, Bit 2 In / 32 / Port 2, Bit 12 In
13 / Port 2, Bit 3 In / 33 / Port 2, Bit 13 In
14 / Port 2, Bit 4 In / 34 / Port 2, Bit 14 In
15 / Port 2, Bit 5 In / 35 / Port 2, Bit 15 In
16 / Port 2, Bit 6 In / 36 / Port 2, Bit 16 In LSB
17 / Port 2, Bit 7 In / 37 / Digital Ground
18 / Port 2, Bit 8 In / 38 / Digital Ground
19 / Port 2, Bit 9 In / 39 / Digital Ground
20 / Port 2, Bit 10 In / 40 / Port 2 Rd Strobe
  1. Interface to Data Recorder / PC data recorder.

This interface transfers data from IO MODULE to the Data Recorder.

Data transfer is unidirectional. 32 bit information is split to two 16 bit word and transmitted with additional, 16 bit synchronization word.

Data Recorder must detect the available data on the bus and processed it in specified time, to not loose the information.

At the end of data transfer cycle, additional word will be sent, to allow system synchronization in case of unexpected error in transmission. This will allow recognizing the word order (Lower word, Upper word andSync word). See Fig 4 for detailed timing diagram.

NOTE: 32 bit word will be divided to two 16bit words and then transferred to the recorder.

The pin assignments for the Data Recorder connector are listed in Table 7.

TABLE 7
Connector DB25 (P on cable; S on module)
Pin# / Function / notes
1 / Q0 / LSB
2 / Q1
3 / Q2
4 / Q3
5 / GND / NC
6 / Q4
7 / Q5
8 / Q6
9 / Q7
10 / GND / NC
11 / Q8
12 / Q9
13 / Q10
14 / Q11
15 / GND / NC
16 / Q12
17 / Q13
18 / Q14
19 / Q15 / MSB
20 / GND / NC
21 / /REQ / Request; Active low Output
22 / GND / NC
23
24
25 / /WR / WRITE Strobe, Active Low Output
  1. Power supply

External power supply: Vin = 6V

Internal power regulators shall generate all required supply voltages:

V1=1.8V(core)

V2=3.3V(internal I/O)

V3=5V(External I/O)

Total power consumption Pt1W. (estimated)

TABLE 8
Connector DE9 (S on cable; P on module)
Pin# / Function / Notes
1 / +6V / 5VMIN; 15VMAX
2 / +6V
3 / -nc-
4 / +6V
5 / +6V
6 / GND
7 / GND
8 / GND
9 / GND

Expectedsupplyd voltage: +6V (usedby other modules)

Suggested pinout below in Table 8. (not critical)

  1. Other...

IO MODULE: Data format;detail description.

This paragraph describes the data structure, transmission format, etc.

There are two similar IO channels: one read by WFFC93 Encoder and another read by a Data Recorder (PC based). The slowest read-out rate device should be faster than the event rate. Data recorder should be faster then Encoder.

  1. Input data from detector / ADC module.

Three connectors (X, Y, P) provide the digital values in following format; see Table 9

(Pin assignments for the X, Y and P connectors are listed in tables 1-3).

Signals are assigned to D0 to D31 word.

Detector mode /Data structure (counter disabled, 12 bit mode, single output word)

TABLE9
LSB MSB / LSB MSB / LSB MSB
D0 / D1 / . . / D11 / D12 / D13 / . . / D23 / D24 / D25 / . . / D31
Y data / X data / P data
Y4 / Y5 / . . / Y15 / X4 / X5 / . . / X15 / P8 / P9 / . . / P15
  1. Data to the Parallel Digital Input (Port 1 and Port 2) (module in WFF93, PCM Encoder)

The data specified above, will be converted to the following format:

Input word (DO to D31, 32 bit, TABLE 9) is converted to two 16bit words,as shown below in TABLE10 and TABLE 11. Data will be read by Encoder in two steps: first PORT 1, then PORT 2.

If data will be not available for read, then control circuit will substitute data with constant “Fill” value.

Each module will have two,user selectable by solder jumper “fill pattern”:

Fill 1=0x9C969593

Fill 2=0xACA6A5A3

TABLE 10
LSB MSB / NOTES
Bit16 / Bit15 / . . / Bit1 / PORT 1 signals; ref TABLE 6
D0 / D1 / . . / D15 / DATA from IO module ref Table 8
TABLE 11
LSB MSB / NOTES
Bit16 / Bit15 / . . / Bit1 / PORT2 signals; ref TABLE 6
D16 / D17 / . . / D31 / DATA from IO module ref Table 8
  1. Data to the Data Recorder (PC based).

a)Data Recorder (PC based)

Interface to data recorder is a 16bit interface with a simple control signal. It will provide a /WR strobe signal to Data Recorder, when data is available and will hold data for 20us on the bus. Data Recorder must process the data in this time. (No Ready/Busy signals). See figure 4 and Table 12.

TABLE 12
LSB MSB / NOTES
time / Q0 / Q1 / . . / Q15 / Signals to Data recorder; ref TABLE 7
t0
t1 / D0 / D1 / . . / D15 / Data Out LOWER word
t2 / D16 / D17 / . . / D31 / Data Out UPPER word
t3 / 0 / 0 / . . / 0 / Sync Word (0x0000)
t4

Miscellaneous

Oscillator.

The control circuit built on a programmable device will require an oscillator to operate. Frequency and its stability are not critical. (LT6905-80 80MHz silicon oscillator: 20/40/80MHz)

Operating conditions and DC characteristics.

Parameter / Air temperature / Supply Voltage
Operating conditions / -40C to +85C / 6V to 12V *NOTE 1
NOTE 1: Supply Voltage: Module will contain a built-in, power regulator. It will accept wide range of supply voltage: Specified above as 6V to 12V, but could be different.
First stage regulator will be an LDO type.

Second stage regulators will be a low power LDO type:

Electrical characteristics

I/O characteristic is defined as AHCT family with Vcc=5V

Reference: see data sheet:

Parameter / Description / conditions / MIN / MAX / unit
VIH / Input HIGH Voltage / 2.30 / V
VIL / Input LOW Voltage / 0.80 / V
VOH / Output HIGH Voltage / IOH=8mA / 3.50 / V
VOL / Output LOW Voltage / IOL=8mA / 0.40 / V
IIC / Inp. clamp current *NOTE 1 / 20 / mA
VIO max / I/O Voltage *NOTE 2 / -0.5 / 5.5 / V
NOTE 1: / Input current limited by external resistors
NOTE 2: / DC Voltage applied to Inputs MAX 7V
DC Voltage applied to Outputs in 3state: VCC+0.5V MAX

Mechanical:

Block diagram: IO Module and external interconnection: see Fig 5

Dimensions: Fig 6 TBD

52-02001_rev04.docPage 1 of 1411/14/2018

Wieslaw Brys