Introduction

In 1854, Mr. George Boole invented Symbolic Logic (today known as Boolean algebra) which can be used to solve the Logic Problems. The Boolean algebra can be used to (analyze and design) computer electronics. It is also known as two-state algebra.

Each variable in Boolean algebra has either of two values: True or False.

  • True = Yes = 1 = High Voltages
  • False = No = 0 = Low Voltages

The binary digit Zero (0) stands for Low Voltage and binary digit One (1) for high voltage.

Gate

A Gate is a circuit with one or more input signals but only one output signal.

Gates are digital (two-state) circuits because the input and output signals are either low or high voltages.

Gates are often called as logic circuits because they can be analyzed with the Boolean algebra.

Basic Gates

There are mainly three types of basic gates.

1. NOT Gate (Inverter)

The NOT Gate has only one input signal and one output signal.

Symbol of Not Gate (Inverter)

Truth Table of NOT Gate

2. AND Gate

The AND Gate has two or more Input Signal but one output signal.The output is "true" when both inputs are "true." Otherwise, the output is "false."

Symbols of AND Gate

Truth Table of AND Gate

3. OR Gate

The OR Gate has two or more Input Signal but one output signal. The output is "true" if either or both of the inputs are "true." If both inputs are "false," then the output is "false."

Symbols of OR Gate

Truth Table of OR Gate

NAND Gate and NOR Gate

NAND Gate

TheNAND gateoperates as an AND gate followed by a NOT gate. It acts in the manner of the logical operation "and" followed by negation. The output is "false" if both inputs are "true." Otherwise, the output is "true."

Symbol

Q= NOT(AANDB)

Truth Table
Input A / Input B / Output Q
0 / 0 / 1
0 / 1 / 1
1 / 0 / 1
1 / 1 / 0

We can use NAND Gate to make all the other gates (such as AND Gate, OR Gate, and NOT Gate). Hence, it is also known/considered as Universal Gate.

NOR Gate

TheNOR gateis a combination OR gate followed by an inverter. Its output is "true" if both inputs are "false." Otherwise, the output is "false."

Symbol

We can use NOR Gate to make all the other gates (such as AND Gate, OR Gate, and NOT Gate). Hence, it is also known/considered as Universal Gate.

Truth Table
Input A / Input B / Output Q
0 / 0 / 1
0 / 1 / 0
1 / 0 / 0
1 / 1 / 0

Universal Gates

NAND Gate and NOR Gate are called Universal Gates because all other gates (for example, AND Gate, OR Gate, and NOT Gate) can be simulated with the help of NAND Gate or NOR Gate.

Alternatives

If no specific AND gates are available, one can be made fromNANDorNORgates, because NAND and NOR gates are considered the "universal gates,meaning that they can be used to make all the others.

Desired gate / NAND construction / NOR construction

If no specific OR gates are available, one can be made from NAND or NOR gates in the configuration shown in the image below. Any logic gate can be made from a combination ofNANDorNORgates.

NAND Construction / NOR construction

If no specific NOT gates are available, one can be made fromNANDorNORgates, because NAND and NOR gates are considered the "universal gates",[1]meaning that they can be used to make all the others.

NAND construction / NOR construction

XOR Gate

The output is "true" if either, but not both, of the inputs are "true." The output is "false" if both inputs are "false" or if both inputs are "true.

The output is 1 if the inputs are different, but 0 if the inputs are the same (for 2 inputs).

The output is 1 when the number of 1s in input is odd, and the output is 0 when the number of incoming 1s is even (for 3 or more inputs).

Symbol

Truth Table
Input A / Input B / Output Q
0 / 0 / 0
0 / 1 / 1
1 / 0 / 1
1 / 1 / 0

XNOR Gate

TheXNOR (exclusive-NOR) gateis a combination XOR gate followed by an inverter. Its output is "true" if the inputs are the same, and"false" if the inputs are different.

A HIGH output (1) results if both of the inputs to the gate are the same. If one but not both inputs are HIGH (1), a LOW output (0) results.

Symbol

Truth Table
Input A / Input B / Output Q
0 / 0 / 1
0 / 1 / 0
1 / 0 / 0
1 / 1 / 1