Topic 2.2.3 Astable Circuits

Topic 2.2.3 – Astable Circuits.

Learning Objectives:

At the end of this topic you will be able to;

recall that an astable circuit has two unstable states;

explain the operation of a circuit based on a Schmitt inverter, and estimate the operating frequency using ;

draw the circuit diagram for an astable using a 555 timer i.c.;

select and use formulae for

the time the output is high:
the time the output is low:
the frequency:

calculate the mark space ratio;

Astable Circuit.

In our previous section we looked at the behaviour of a monostable circuit, i.e. a circuit with just one stable state. In this section we will be looking at the astable circuit. The astable circuit has no stable state and is constantly switching between logic 1 and logic 0. Alternative names for the astable are a pulse generator or clock.

The astable is a very useful circuit in electronics as it the circuit responsible for causing flashing lights, pulsing buzzers in alarm circuits and keeping counters running as we found out in module ET1, even though we didn’t look at how the clock was produced at that time.

Once again we will be considering two different methods of producing an astable circuit. The first method involves the use of a special type of NOT gate, called a Schmitt NOT gate, or Schmitt inverter. The symbol for the Schmitt inverter is as follows:

The Schmitt NOT gate has a unique switching characteristic which is very different to the standard NOT gate. The following diagrams illustrate the difference between to two.

Looking at the two characteristics you should notice that for a standard NOT gate operating on a 5V supply that the switching point is at the midpoint of the supply voltage for an increasing or decreasing input voltage.

Comparing this to the Schmitt characteristic reveals a different situation altogether. As VIN increases the voltage has to increase above 3V before the output voltage changes. Once the output has changed however, if the input is then decreased back to 3V, the output does not change back, as it would in the normal case, but now the voltage has to fall to below 2V before the output will go high again.

We have therefore created some hysteresis in the NOT gate with two distinct switching thresholds. We can use this to our advantage to make an astable timer with the addition of just a resistor and a capacitor. The circuit required is shown below.

This is a very simple circuit, but very reliable, requiring the minimum number of components, and taking up very little space on a circuit board.

The frequency of the output is given by the approximation

How does it work?

Assume that initially there is no charge on the capacitor, so the input to the NOT gate will be Logic 0, so the output is at Logic 1.
The capacitor begins to charge through the resistor R1 and so the voltage at the input of the NOT gate starts to rise.
When the voltage at the input reaches the upper switching threshold, the output of the logic gate changes to Logic 0.
The capacitor now starts to discharge through the resistor R1, and the voltage across the capacitor begins to fall.
When the voltage at the input reaches the lower switching threshold, the output of the logic gate changes to Logic 1 again,
The capacitor starts to charge through R1 again and the whole process repeats as long as the power is switched on.

Note : When selecting the resistor for the Schmitt astable circuit you should ensure that the minimum value of resistance chosen is 1kΩ. This will limit the current flowing to an acceptably low value, and prevent overheating of the Schmitt i.c. device.

The addition of an oscilloscope to the circuit, shows this happening, as shown below:

The red trace, shows the voltage at the input to the Schmitt NOT gate, the blue trace shows the voltage at the output of the Schmitt NOT gate.

Notes:

1.The first cycle lasts longer than subsequent pulses as the capacitor has to charge up from 0V, to the upper switching threshold.

2.After the first cycle the capacitor charges and discharges between the upper and lower switching threshold of the Schmitt NOT gate.

3.The ‘On’ time, and ‘Off’ time are of the same duration.

The Schmitt NOT gate solution is a very simple, neat and reliable solution if a simple clock, or pulse generator is required. However if you want to have a different ‘on’ and ‘off’ time then this simple circuit cannot perform this action, and we need to consider a more complex solution.

The second method of making an astable timer is to use a familiar device in the 555 timer we used for the monostable timer. This versatile device can also be configured to run as an astable timer, by making the connections shown below:

The circuit has many similarities with the monostable option, and it is important to ensure that you do not confuse the two as you are expected to be able to draw this circuit in the examination.

There are three formulae that apply to this circuit, all of which are provided on the Candidate Information page at the front of every examination paper so you do not have to remember them.

the time the output is high:
the time the output is low:
the frequency:

From these formulae we can see that the ‘on’ time is always greater than the ‘off’ time, but will be approximately the same if RBRA.

We can confirm this by adding an oscilloscope to the output of the 555 astable circuit to see what the output looks like.

Here we can see that with the two resistors equal in value, the ‘on’ time is approximately twice as long as the ‘off’ time. If R1 is changed to 1kΩ and R2 changed to 100kΩ then output becomes as shown below, where the ‘on’ time is virtually equal to the ‘off’ time.

Note : When selecting resistors for the 555 timer circuit you should ensure that the minimum value of resistance chosen is 1kΩ. This will limit the current flowing to an acceptably low value, and prevent overheating of the 555 i.c. device.

The Mark-Space Ratio.

A common way of specifying the parameters of an astable circuit are in terms of the Mark-Space ratio. This sounds complicated but actually is quite straightforward. The ‘Mark’ refers to the ‘On’ time, the ‘Space’ is simply the ‘Off’ time. So if an astable is specified as having a Mark-Space ratio of 3:1, then the ‘on’ time must be three times as long as the ‘off’ time. Graphically this would be shown as follows:

Student Exercise 1:

1.The following circuit diagram shows a 555 timer configured as an astable timer.

(i)Calculate the duration of the ‘on’ pulse for the above circuit.

......

(ii)Calculate the duration of the ‘off’ pulse for the above circuit.

......

(iii)Hence, or otherwise calculate the frequency of the output.

......

2.(a)Use the grid below to draw an astable waveform with a mark-space ratio of 2:1.

(b)Use the grid below to draw an astable waveform with a mark-space ratio of 2:3.

3.Complete the diagram below to show how an astable timer can be made from a Schmitt NOT gate, and choose component values to give a frequency of 2Hz.

Calculations:

......

The following questions have been taken from recent examination papers covering the use of astable circuits. Some reference is also made to monostable circuits as the two topics are often linked in examination questions.

1.The following diagram shows an astable built with a 555 timer used to clock an l.e.d.

A data sheet for the 555 astable gives the following information

(a)Calculate the values of T1 and T2 for the astable.

......

[2]

(b)Explain how the circuit could be modified to provide a variable mark-space ratio.

......

[2]

2.The following diagram shows a 555 timer being used as an astable.

A data sheet for the 555 astable gives the following information

(a)Calculate the values of T1 and T2 for the astable.

......

[2]

(b)Calculate the frequency of the astable.

......

[2]

3.A Schmitt inverter can be used as an astable circuit.

(a)Complete the circuit diagram for the astable circuit.

[2]

(b)Draw a sketch to illustrate the output waveform produced by the astable. Your sketch should show clearly how an astable waveform differs from a monostable waveform.

[2]

3.The following alarm system sets off a buzzer when the monostable is triggered.

The monostable output remains high for 8 seconds after it is triggered.
The astable has an equal mark-space ratio and a period of 2 seconds.
The output of the AND gate is high only when both its input are high.

(a)Describe what the alarm does over the 8 second period after the monostable is triggered.

......

[1]

(b)Draw a sketch of the waveform produced at the output of the AND gate over the 10 second period after the monostable is triggered.

[2]

4.The following diagram shows a 555 timer being used as an astable.

(a)The output signal has a mark:space ratio of 4:1. Sketch two cycles of the output signal.

Label the mark T1 and the space T2.

[3]

(b)The space T2 has a duration of 30 ms. Calculate the value of resistor RB that will produce this space when C = 3.3μF.

......

[2]

(c)Determine the value of resistor RA.

......

[1]

Solutions to Student Exercises

Student Exercise 1:

1.(i)the time the output is high:

(ii) the time the output is low:

(iii)the frequency:

2.(a)

(b)

3.When faced with a design problem of this type we have a dilemma of whether to choose a capacitor or resistor value to start with. As the minimum value of resistor we can use is 1kΩ then this might be a good value to start with, as the capacitor can be of any value.

This is only one solution, the following combinations are also acceptable; 5kΩ and 100μF, 20kΩ and 250μF,500kΩ and 1μF, 200kΩ and 25μF,Substitute them into the formula to check them out. Remember you may have come up with another perfectly acceptable solution.

Self Evaluation Review

Learning Objectives / My personal review of these objectives:
 /  / 
recall that an astable circuit has two unstable states;
explain the operation of a circuit based on a Schmitt inverter, and estimate the operating frequency using ;
draw the circuit diagram for an astable using a 555 timer i.c.;
select and use formulae for

The time the output is high:
The time the output is low:
The frequency:

calculate the mark space ratio;

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