CUIT105 Group Assignment

Question / Group members
Question 1
a)Convert the following:
  1. 1 1100.0112 to Octal
  2. 27.187510 to Hexadecimal
  3. DE.E16 to Binary
  4. 1110 10112 to 8421 BCD
b)Perform the following 8-bit additions using 1’s complement method
  1. +13-11
  2. +8-15
  3. -11-6
  4. +5 + 6
c)Perform the following 8-bit additions using 2’s complement method
  1. +12 - 10
  2. +9 -17
  3. -10-7
  4. +4+7
/ Mugadza Takecare
Chiko Charles
Kuwanda Ryan
Nhoro Tatenda
Mukorivo Joseph
Question 2
Derive the state table and the state diagram of the sequential circuit shown below. Explain the function that the circuit performs.

Question 3
b)Given the Boolean function Implement the logic circuit using
  1. NAND gates only and
  2. NOR gates only
c)Given the Boolean function
  1. Draw a logic diagram of F
  2. Implement F using a truth table
  3. Express F as SOP
/ Mabhena Faith
Jongwedzvuku Providence
Mangadza Tinotenda
Mukanganyama Nelson
Sanyahangare Tinashe
Muzinda Trevlyn
Question 4
a)What is difference between latch and flip-flop?
b)Analyze the sequential circuit in figure below. Give its next state equations

Question 5
Simplify the following
a) using laws of Boolean algebra
b) use 4-variable K-Maps
c) using a 4-variable K-Map / Goho Greatwin
Chanaiwa Clarence
Chirinda Agatha
Mangondo Tinashe
Takaedza Dorothy
Vhurumuku Elijah
Question 6 A sequential circuit has one flip-flop, Q; two inputs, x and y; and one output, S. It consists of a full-adder circuit connected to a D flip-flop, as shown in below. Derive the state table and state diagram of the sequential circuit.
Question 7
An 8-to-1 MUX has inputs A, B, and C connected to selection lines S2, S1, and S0 respectively. The data inputs I0 to I7 are connected as I1 = I2 = I7 = 0, I3 = I5 = 1, I0 = I4 = D, and I6 = D'. Determine the Boolean expression of the MUX output. / Chikapu Hazel
Dapi Joel
Gondo Tshaxedue
Kagodo Prosher
Manyere Tafadzwa
Mwaitirwa Goodluck
Question 8
Analyse the following sequential circuit shown and obtain:
a)Flip flop input and output equations
b)Next state equation
c)Next state - present state table
d)State transition diagram

Question 9
Design a circuit that generates the square of a 3-bit number / Mlambo Catherine
Kaseke Arnold
Nyakawo Vimbai
Mukuchura Phidelis
Nyarubero Natasha
Todini Shingirayi
Question 10
A sequential circuit has two JK flip-flops, A and B; two inputs, x and y; and one output, z. The flip-flop input functions and the circuit output function are as follows:
JA = Bx + B'y' KA = B'xy'
JB = A'x
z = Axy + Bx'y'
a)Draw the logic diagram of the circuit.
b)Tabulate the state table.
c) Derive the next-state equations for A and B.
Question 11
Design a parity generator for a 4 bit message packet in an even machine. / Banda Andrew
Ganga Arnold
Diego Winner
Katsande Lawrence
Zindoga Robson
Question 12
Design a sequential circuit with two D flip-flops, A and B, and one input, x. When x = 0, the state of the circuit remains the same. When x = 1, the circuit goes through the state transitions from 00 to 01 to 11 to 10 back to 00, and repeats.
Question 13
Design a combinational circuit for a BCD-to-gray code using
decoder, 8-to-1 multiplexer / Maruve Lynet
Mkandla Nokuthaba
Kuhamba Elton
Hwariva Simbarashe
Mutanga Lloyd
Mushoriwa Tawanda
Question 14
A sequential circuit has one input and one output. The state diagram is as shown. Design a sequential circuit using T type flip flops

Question 15
Design a circuit that converts a 4-bit gray code to 4-bit binary
Implement F (A, B, C, D) = (0, 1, 3, 4, 8, 9, 15) using a 4×1 multiplexer / Ferenyenye Obey
Chitauro Ronald
George Anaphy
Kofu Brighton
Kutama Thabitha
Jeke Pritchard
Question 16
Design a synchronous counter using S-R flip-Flops to count in the sequence 0,1,2,4,5,6,0,1,2,… Use state diagram and state table.
Question 17
Design a circuit that converts 8421 BCD code to seven segment driver
Design a full adder circuit with a decoder / Gwerevende Emmanuel
Makaza Ropafadzo
Kamtowe Saleem
Jemwa Rukudzo
Muchena Tecla
Nyakudanga Lovender
Question 18
Construct a 2-bit synchronous counter using the J-K flip flop (it should count 0001101100...).
Question 19
Design a 3-bit counter which counts in the sequence:
001, 011, 010, 110, 111, 101, 100, (repeat) 001, . . .
Use D flip-flops / Dondo Tinashe
Zvenhamo Tinotenda
Question 20
The Figure below shows a BCD counter that produces a 4-bit output representing the BCD code for the number of pulses that have been applied to the counter input, for example, after four pulses have occurred, the counter outputs are (ABCD) = (0100)2 = (04)10. The counter resets to 0000 on the tenth pulse and starts counting over again. Design the logic circuit that produces a HIGH output. Whenever the count is 2, 3 or 9. Use K-maps and take advantages of “don’t care “conditions. Implement the logic circuit using NAND gates.

Question 21
Realize the Boolean expression F(w,x,y,z) = ∑m(4,6,7,8,10,12,15) using a 4-1 multiplexer. / Chitimbe Kethib
Guzha Anotida
Hare Simbarashe
Musendo takunda
Question 22
Design a sequential circuit with two JK flip-flops, A and B, and two inputs, E and x. If E = 0, the circuit remains in the same state regardless of the value of x. When E = 1 and x = I, the circuit goes through the state transitions from 00 to 01 to 10 to 11 back to 00, and repeats. When E= 1 and x = 0, the circuit goes through the state transitions from 00 to 11 to 10 to 01 back to 00, and repeats.
Question 23
Design an 8-4-2-1 BCD code converter to drive a seven-segment indicator. The four inputs to the converter circuit (A, B, C, and D in Figure 3) represent an 8-4-2-1 binary-coded-decimal digit. Assume that only input combinations representing the digits 0 through 9 can occur as inputs, so that the combinations 1010 through 1111 are don’t-cares. Design your circuit using only two-, three-, and four-input NAND gates and inverters. Try to minimize the number of gates required. The variables A, B, C, and D will be available from toggle switches.

Figure 3
/ Mubaiwa Lloyd
Kajiva Farai
Maqathelana Vanessa
Masvora Blissful
Madzikisi Paddington
Mukwama Ellis
Nyamadzawo Ngonidzaishe
Question 24
Design a synchronous mod-5 counter using JK flip flop. Give the excitation table, state table and state transition diagram of J-K flip flop.
Question 25
Implement a full-adder with two 4 x I multiplexers. / Mutawu Takudzwa
Muzvidziwa Munyaradzi
Rubvuwe Wellington
Simango Llyod
Tumbare Blessing
Ucheuche Adorn
Dohwe Tanaka
Question 26
Design a clocked sequential circuit that operates according to the state diagram shown Figure 4. Implement the circuit using D- flip flop.

Figure 4
Question 27
A BCD code is being transmitted to a remote receiver. The bits are A3,A2, A1, and A0, with A3 as the MSB. The receiver circuitry includes a BCD error detector circuit that examines the received code to see if it is a legal BCD code (i.e., ≤1001). Design this circuit to produce a HIGH for any error condition. / Dondo Clever
Dube Tapiwa
Question 28
An M-N sequential circuit performs the following functions.
An M-N flip-flop works as follows:
  • If MN =00, the next state of the flip-flop is 0.
  • If MN =01, the next state of the flip-flop is the same as the present state.
  • If MN = 10, the next state of the flip-flop is the complement of the present state.
  • If MN =11, the next state of the flip-flop is 1.
a)Illustrate the behavior of M-N using
  1. State table
  2. State Transition Diagram
Using a clocked J-K flip flop design the circuit