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Background Statement for Document 5133
LINE ITEMS REVISION OF SEMI M1-0211
SPECIFICATIONS FOR POLISHED SINGLE CRYSTAL SILICON WAFERS
Notice: This background statement is not part of the balloted item. It is provided solely to assist the recipient in reaching an informed decision based on the rationale of the activity that preceded the creation of this document.
Notice: Recipients of this document are invited to submit, with their comments, notification of any relevant patented technology or copyrighted items of which they are aware and to provide supporting documentation. In this context, “patented technology” is defined as technology for which a patent has issued or has been applied for. In the latter case, only publicly available information on the contents of the patent application is to be provided.
This document has two line items.
Line Item 1 covers some updates to SEMI M1 that result from revisions of cited standards and a few other mostly editorial and style issues.
Line Item 2 covers some updates on withdrawn SOI Wafer references.
This letter ballot will be issued in cycle 2 of 2011 and reviewed by the International Polished Wafer Specification Task Forces and adjudicated by the Silicon Wafer Committee at their meetings at NA Spring Meeting, in March 28-29 at Intel in Santa Clara, CA.
Check www.semi.org/standards for the latest schedule.
For question on the ballot, contact SEMI Staff, Kevin Nguyen at
This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an official or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited.
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Semiconductor Equipment and Materials International
3081 Zanker Road
San Jose, CA 95134-2127
Phone:408.943.6900 Fax: 408.943.7943
xxxx
SEMI Draft Document 5133
LINE ITEMS REVISION OF SEMI M1-0211
SPECIFICATIONS FOR POLISHED SINGLE CRYSTAL SILICON WAFERS
Line Item 1: Change reference to M77 and modify appropriate wording
In ¶ 3.1, remove SEMI M69 and add the following in proper order:
SEMI M77 — Practice for Determining Wafer Near-edge Geometry Using Roll-off Amount, ROA
Replace M69 with M77 in Row 2-6.15 of Table 2 and in ¶ R2-7.15.3
2-6.15 / Near Edge Geometry / [ ] ESFQR, [ ] ESFQD. or [ ] ESBIR / SEMI M67[ ] ZDD / SEMI M68
[ ] L-ROA, [ ] P-LOA / SEMI M69 M77
[ ] PSFQR, [ ] PSFQD / SEMI M70
R2-7.15.3 SEMI M69 M77 quantifies the roll-of amount, ROA, based on a linear reference, (L-ROA) or a polynomial reference (P-ROA) in the near edge region.
Revise ¶ 4.1 as follows:
4.1 Terms. and acronyms, and symbols associated with silicon wafers and silicon technology are listed and defined in SEMIM59.
Revise ¶ R2-7.8.1 as follows:
R2-7.8.1 For off-orientation {111} wafers, the orthogonal misorientation is may be specified for each of the wafer categories in Tables 5–10 (see line 2-1.9 of Table 1, Part 2. There is no standardized measurement method for this property so it should be determined by a method agreed upon between supplier and customer.
Line Item 2: Change reference of SOI Wafers
In ¶ 3.1, remove SEMI M34 and M47 and add M71 as follows:
SEMI M34 — Guide for Specifying SIMOX Wafers
SEMI M47 — Specification for Silicon-on-Insulator (SOI) Wafers for CMOS LSI Applications
SEMI M71 — Specification for Silicon-on-Insulator (SOI) Wafers for CMOS LSI
Revise ¶ 2.1 as follows:
2.1 These specifications do not cover the requirements for the following related silicon materials and wafers:
· SOI wafers (see SEMI M34, SEMI M41, SEMI M47 SEMI M71, or JEITA EM-3603)
End of revisions.
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By publication of this standard, Semiconductor Equipment and Materials International (SEMI) takes no position respecting the validity of any patent rights or copyrights asserted in connection with any items mentioned in this standard. Users of this standard are expressly advised that determination of any such patent rights or copyrights, and the risk of infringement of such rights are entirely their own responsibility.
This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an official or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited.
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