ECET360

Lab Week 4 : ECAD

Object: the objectives of this lab are:

-Re/acquaint yourselves with PCB Artist. Remember the Help files are your friend!!

-layout a PCB which can be used on automated equipment.

-Create a new component footprint

Procedure:Working in pairs:

1.Use the PCB Layout tool in PCB Artist. If you have not used the tool for PCB layout, there is a Design Tutorial under the Help menu.

2.Examine the Component Libraries, and determine the libraries that include SMT parts, ignoring ceramic parts like LCCC’s. Create a list of those libraries, and the type of part that you would typically expect to use those footprints (e.g., SOIC footprints would be for gull-wing ICs).

3.Start a file for a 4X4 board 2-layer (no inner planes) including parts as noted below. To begin your board layout, start PCB Artist, and select PCB design.

4.Using the Library Manager (the little book in the toolbar), create a new PCB footprint for a 20-lead QFN package, with a center DAP. For a dimensional model, use the Peregrine Semiconductor QFN-20, such as that used by their PE4308: Follow Advanced Circuit’s “Part Creation Tutorial” in their Tips & Tools.

  • Be sure to set the dimensional basis correctly (mm or inch?)
  • Make the PCB pads the same width as the component terminations.
  • Make the PCB pads extend beyone the component body by 0.5mm
  • Make the DAP PCB pad the same size as the ICs DAP

In order for your footprint to be used in a PCB layout, you must also create a new Component. To do this, open the Library Manager and select “New Item”. Uncheck “Schematic” and create a new component, in a new component library, with the QFN footprint you just made.

5.Now layout a 4"X4” printed circuit board using the following footprints in the quantities listed:

2-QFP 44 (25-mil pitch)1206-package chip capacitors, as noted below

4-SO 161-3 pin header (pins at 0.100” pitch)

1 QFN, your design (#4 above)4.7μf tantalum caps at each SO between pin 5 & com

  • Use 8mil/0.25mm traces on the board. This should be very close to the width of the pads on your QFN.
  • Remember you must create connections with the Connection Tool and thereby a netlist before you route copper traces. Create the connects as follows:
  • Connect all IC pin #1’s together, terminating at pin 1 of a 3-pin header with 0.100” pitch. The header is to be in the middle of one side, 1/2” from the edge of the board and parallel to the edge.
  • Connect all pin#16’s together, terminating at pin 3 of the same 3-pin header
  • Connect pin#12 of each IC to individual 1206 chip Cs – connect the other end to a common node/net.
  • Connect the commons of all chip C’s (and thereby establish ground) at pin 2 of the header.
  • Connect the pin 8 of all IC’s to the same pin 2 of the header
  • Layout should be neat, with space between parts for inspection of solder joints.

The board is to have one tooling hole, suitable for use as an index on the automatedmachines.

3/16”

3/16”

Tooling hole is 1/8” diameter, and must be 3/16” from the corner of the board. Metric equal OK.

While a tooling hole is not identical to a mounting hole, as they have different functions on the board, you can create a tooling hole in the same way as a mounting hole is created. To do this, search Help for “Add Pad”, and in the Add Pad function you will find a section on “To add a mounting hole”.

  • Board to have three 1/8”/0.3mm diameter fiducials near different corners. These are necessary to use a board on an automated system. The fiducials must be in the top copper layer, unconnected to any net.
  • Be certain that any mounting holes or a fiducialsare on the board but not in the schematic/netlist,
  • Board must have lettering which will read correctly in the copper on an etched board. The lettering will be “ECET360” and the initials of the two people who worked on the board, e.g “ECET360 DNJC”.

When you make printouts, you will be able to verify your QFN design with the actual part, which is available in the lab.

The printouts due with your report must be suitable for fabrication. This means you must separately printout each layer: top copper, bottom copper, top silkscreen, and if used, bottom silkscreen.

Report: (due the beginning of the following week's lab)

For this lab, the deliverables are:

-Any problems you encountered during the Layout work, and their solutions

-Library list from procedure #2.

-Board layout printouts suitable for fabrication – printout each layer individually:

  • Top copper
  • Bottom copper
  • Top silkscreen
  • Bottom silkscreen
  • BE CERTAIN to label each printed out layer
  • -the netlist for your design

Note: any layouts turned in that are found to be identical to another teams’ will be assumed to be the result of copying. All student teams involved will receive “0” as a grade.

Report is DUE at the beginning of your 360 lab the week of February9. To allow time for this work, there will be no required lab the week ofFebruary2.

Although your lab instructor will be available in his office during lab times if you want to work in MGL1222, or have questions.