PUZZLE

a, b,

1+1=0 1+1=2

PUZZLE

c, d,

15+15=60

0E+01=0F

PUZZLE

2. TheoriginalASCIIcodes bitsorcharacters.

(a) (b)

PUZZLE

I make

oneweek

Imake

onebyte

PUZZLE

(c) (d)

PUZZLE

Countof interruptsin

8086 microprocessor

Subtract

1from16

Bytes

3. The4-bitbinarynumber0111represents

a,-3+4 b,-3-4 c,3+4 d,3-4

4. Thedecimalnumber255may berepresentedby

(a)11111111B,(b)10000000B,(c) EEEEH,(d)01111111

5. The8-bitbinarynumber11111111represents

-1 / -1 / -8
2 / 2 / 5
7 / 5

6. Thedecimalnumber127mayberepresentedbythefollowingbinarynumbers.

a, / EquivalentvalueofFFH
b, / 1’sComplementof01111111B
c, / EEH
d, / 2’sComplementof10000001B

7. Abytecorrespondsto

(a) 22bits(b) 24bits(c)23bits(d)25bits

M

Bytes K

G

9. AKbcorrespondsto

(a)1024bits(b)1000bytes(c)210bytes(d)210bits

10.Asuperscalarprocessorhas

a,

Mouse Printer

System

Keyboard

Display

C, b,

Fn11 Fn2 R A

Fn3 Fn4

M

d,

11.A32-bitprocessorhas

B, A,

32 Bit

Registers

D, C,

32 MBRAM

32 BitBus

12.Informationisstoredandtransmittedinsideacomputerin

a, b,

1+1=0 1+1=2

c, d,

15+15=60

0E+01=0F

A,

A,B,C……

B,

4

C,

1 / 1 / 0 / 1 / 1

D,

1 / 1 / 0 / 1 / 1

14.Theminimumnumberofbits requiredtostorethehexadecimalnumberFF is

A,

1

B,

2 1

C,

8 / 4 / 2 / 1

D,

128 / 64 / 32 / 16 / 8 / 4 / 2 / 1

15.A20-bitaddressbusallows accesstoamemoryofcapacity

A, b,

20

2*20

2

C, d, 2

20*20 2

a, b,

13+14

13.5+14

C, 1.5*2.8

D,

1 MBRAM

17.PipeliningimprovesCPUperformance dueto

A,MemoryAccessTime

B,

18.Thesystembusismadeupof

A, b,

DataBus

c,

ControlBus

19.Amachinecyclerefersto

T1 T2 T3 T4

a,

F D E S

T1

C,

b,

F

d,

T3

E

20.Accessingdiskstorage isslowerthanaccessingRAMbyanorderof

A, b,

10

1

100

1

C, d,

1000

100000

1 1

21. ThetypicaldiskstoragecapacityofaPC isof theorderof

32M

Bytes 5120K

2G

22.Arrangetheblocksinappropriate order

Control unit

ALU

Input

Memory unit

Output

23.Picktheoddoneout, a. Transducers b. Keyboard

c. ToggleSwitched d. Lineprinter

24.Findouttypeof signal

PC
SP
IR
ID

?

a. DataSignals

b. Controlsignals c. Instruction

d. Bus

25.WhatamI?

SP

a. Register b. Memory c. Stack

d. Queue

26.FIFOindicates

B, A,

D,

C,

27.Arrangethefollowinginoperatingstages

A, b,

A+B Stage

Memory

Instruction

C, d,

Memory

Result

Decoder

28.Whichindicatesclockperiod?

B, A,

C,

D,

29.The largestdelayinaccessingdataondiskisdue

a, b,

WaitingTime

Time

C,

Time

TX RX

30.Choosethecorrectformat.

A,

Operational

Code

Addressing mode

Operand

Addressing

B,

Addressing mode

Operational

Code

Operand

Addressing

C,

Operand

Addressing

Addressing mode

Operational

Code

D,

Operational

Code

Addressing mode

31.Whatdoesitindicate?

a. ImmediateAddressingmode b. RegisterAddressingmode

c. DirectAddressingmode

d. IndirectAddressingmode 05

a. ImmediateAddressingmode b. RegisterAddressingmode

c. DirectAddressingmode

d. IndirectAddressingmode

33.SJUMPmeanssignjump

A,True

B,False

34.Filltheblockgivenbelow. a. Compiler

b. Assembler c. Converter d. Inverter

Assembly

Language ?

Program

Machine

Language

Program

35.Fillthefollowing

HighLevel

Language

Program

Compiler ?

a. Lowlevellanguageprogram

b. Assemblylevellanguageprogram c. Machine levelprogram

d. Compiledprogram

36.Whatdoesitindicate

a. Input-OutputBus b. ControlBus

c. Datalines

Input Output

Enable/Disable

37.WhatdoesT3(2)indicate?

Cycle / P1 / P2 / P3 / P4
1 / T1(1) / - / - / -
2 / T1(2) / T2(1) / - / -
3 / T1(3) / T2(2) / T3(1) / -
4 / T1(4) / T2(3) / T3(2) / T4(1)

38.Whatdoesitmean?

a. Register b. Stack

c. Accumulator

d. SegmentedMemory

?

?

40.Fillthemissingsegment.

ES
DS
CS

41.Matchthefollowing

StatusBits / Segments
S4 / S3
0 / 0 / SS
0 / 1 / DS
1 / 0 / ES
1 / 1 / SS
BHE / A0 / Data Access
0 / 0 / None
0 / 1 / Both higher
lowerbank
1 / 0 / Lower order
bankaccess
1 / 1 / Lower order
bankaccess

43.Matchthefollowing

S2 / S1 / S0 / Controlfunction
0 / 0 / 0 / InterruptAck
0 / 0 / 1 / I/Oread
0 / 1 / 0 / I/Owrite
0 / 1 / 1 / Halt
1 / 0 / 0 / Opcodefetch
1 / 0 / 1 / Memory read
1 / 1 / 0 / Memorywrite
1 / 1 / 1 / No operation

44.Matchthefollowing

QS1 / QS0 / Data Access
0 / 0 / IdleState
0 / 1 / Firstbyteofopcode hasentered queue
1 / 0 / Queueempty
1 / 1 / Subsequentbyteof
opcodehasentered queue
IO/M
bar / DT/R
bar / SSO
bar / Controlfunction
0 / 0 / 0 / InterruptAck
0 / 0 / 1 / Memory read
0 / 1 / 0 / Memorywrite
0 / 1 / 1 / Halt
1 / 0 / 0 / Opcodefetch
1 / 0 / 1 / I/Oread
1 / 1 / 0 / I/Owrite
1 / 1 / 1 / No operation

46.Thefollowingaddressresidesat00001,00003,00005

a. Higherorderbank b. Lowerorderbank c. Both

d. Noneofthese

47.Picktheoddone out

a. ALEismadehigh

b. M/IObarismadehigh c. Dataisputondatalines d. DT/Rbarislow

48.Fillintheblanksgivenbelow

G1.(G2B. )=1

49.Whattype of interruptsindicatedby

(a),(b), & (c)

(c)

(b)

(a)

50. Interruptvectortypemultiplyby4=

51.Matchthefollowing

Type/vector / Specific
Interrupt
0 / INT softint
1 / Non-maskable
2 / Divideby zero
3 / INT0
4 / Singlestep
NMI
Divideby zero
Singlestep
INTR
INT0

53.Matchthefollowing

Pins / Functions
Reset / DMA request
Test / Extend the no ofcycles
Ready / Pushestheflagregister,
CS,IP to stack
Hold / BringstheCPU outof
idlestate

.

BP 4100

4100 07

AL 07

54.Namethetypeofaddressingmode

55.Namethetypeofaddressingmode

56.Picktheoddoneout a. ORG

b. OFFSET c. LABEL d. DUP

57.LODSB comprisesthefollowing

Trueor

False

(AL)(DS:SI)

Trueor

False

(ES:DI)--(AL)

59.Telltheoperationhappensinexecutingbelowinstruction

TESTdest,src

60.Filltheemptyblock.

? / ?
CL / ?
? / BH
AL / ?

61. In8085namethe16 bitregisters.

B, A,

C,

Instruction

Register

62.BHEof8086processorsignalisusedtointerfacethe

A, b,

00007
00005
00003
00001

C,

I/ODevices

63. In8085areofthefollowingstatements isnottrue

A)Coprocessorisinterfacedinmax mode. B)CoprocessorisinterfacedinmINmode C)Coprocessorisinterfacedinmax/minmode. D)Supportspipelinig.

Ans-(B)

64. InwhichT-statedoestheCPUsendsthe addresstomemoryorI/OandtheALEsignal fordemultiplexing

65. InaDMAwriteoperationthedataistransferred

a,

I/O

B,

I/O

C,

D,

I/O I/O

66.WhichtypeofJMPinstructionassemblesifthedistanceis0020hbytes

Data

a,

segment

b,

Code segment

Data segment

67.WhichofthefollowingistruewithrespecttoEEPROM?

(A)contentscanbeerasedbytewiseonly.

(B)contentsoffullmemorycanbeerasedtogether. (C)contentscanbeerasedusingultravioletrays (D)contentscannotbeerased

68.Numberofthetimesthe instructionsequencebelowwill loopbeforecomingoutof loopis

MOVAL, 00h A1:INCAL JNZA1

(A)00(B)01(C)255(D)256

69.WhatwillbethecontentsofregisterAL afterthefollowinghasbeenexecuted

MOVBL, 8C MOVAL, 7E ADDAL,BL

(A)0Aandcarryflag isset(B)0Aandcarryflag isreset

(C)6Aandcarryflag isset(D)6Aandcarryflag isreset

70.Directionflag is used with

(A)Stringinstructions.(B)Stackinstructions.

(C)Arithmetic instructions.(D)Branchinstructions.

A, b,

MOVSB,

STOSB

POPPUSH

C, d,

ADD,SUB,MUL, DIV

JMP,CALL,LOOP

71. Thedevicesthatprovidethemeansfora computerto communicatewiththeuseror other computersarereferredtoas:

72.Thesoftwareusedtodrivemicroprocessor-basedsystemsiscalled

73. Thecircuitsinthe8085Athatprovidethearithmeticandlogicfunctionsarecalledthe

A,

Mouse Printer

System

Keyboard

Display

B, C,

ALU

74.Howmany busesareconnectedaspartof the8085Amicroprocessor?

A,Numberof binarydigits

B,Numberofbitsinabyte

C,Numberofmemorysegmentsin8086

CPU

75. The ensuresthatonlyoneICis active atatimetoavoidabusconflictcausedbytwo

ICswriting differentdatatothesamebus.

76.How many bitsareusedinthedatabus?

77.Single-bitindicatorsthatmaybesetor clearedtoshowtheresultsof logicalor arithmetic operationsarethe:

a, b,

C,

Monitor

78. Thetechniqueof assigningamemory addresstoeachI/Odeviceinthecomputersystemis called:

A. memory-mappedI/O

B. portedI/O

C. dedicatedI/O

D. wiredI/O

79.Whenwasthefirst8-bitmicroprocessorintroduced?

A. 1969 B. 1974

C. 1979 D. 1985

80.Whattypeof circuitisused attheinterfacepoint of anoutputport?

a, b,

S Q

R

Q bar

EN

c,

81.I/Omappedsystemsidentifytheirinput/outputdevicesbygivingthema(n) .

a, b, c,

PPI INOUT

82.Theregisterinthe8085Athatisusedtokeeptrackof thememoryaddressof thenextop-codeto berunintheprogramisthe:

A,

B,

C,

AL AH

83.The controlbusandmemoriesshareabidirectionalbusinatypicalmicroprocessorsystem.

TrueorFalse

84. The8085Aisa(n):

A,

B, C, D,

85.BecausemicroprocessorCPUsdonotunderstandmnemonicsasthey are,theyhavetobe convertedto .

A, b,

15+15=60

0E+01=0F

c, d,

1+1=0

1+1=2

86.Whatisthedifferencebetweenamnemoniccode andmachinecode?

A. Thereisnodifference.

B. Machinecodesareinbinary,mnemoniccodes areinshorthandEnglish.

C. Machinecodesarein shorthandEnglish,mnemoniccodesareinbinary.

87.Identifythefollowingbuses?

A, b,

RD,WR

C,

88.Whatkindofdeviceisusedtoconvertmnemoniccodetomachinecode?

A,

Assembly Language Program

B,

HighLevel Language Program

Machine Language Program

Machine

Language

Program

89.LDAaddrandSTAaddrareFortranlanguageinstructionsstoredin anexternalmemoryICfor a microprocessor.

A,True B,False

90.The8051has 16-bitcounter/timers.

91.Whenthe8051isresetandthe lineisHIGH,theprogramcounterpointstothefirstprogram instructioninthe:

92.Analternatefunctionof portpinP3.4inthe8051is:

93.Whichof thefollowingcommandswill movethenumber27Hintotheaccumulator?

A. MOVA,P27

B. MOVA,#27H C. MOVA,27H D. MOVA,@27

94.Whatisthedifferencebetweenthe8031andthe8051?

A. The8031hasnointerrupts.

B. The8031isROM-less.

C. The8051isROM-less.

D. The8051has64bytesmorememory.

95.The contentsof theaccumulatorafterthisoperation

MOVA,#2BH ORLA,00H will be:

A. 1BH B. 2B H C. 3BH

D. 4BH

96.Whichis/arethebasicrefreshmode(s)for dynamicRAM?

A. Burstrefresh

B. Distributedrefresh

C. Openrefresh

D. Burstrefreshanddistributedrefresh

97.Forthegivencircuit,whatmemorylocationisbeingaddressed?

A. 10111 B. 249

C. 5 D. 157

98.Whichof thefollowingRAMtimingparametersdetermineitsoperatingspeed?

A. tACC

B. tAAandtACS

C. tCOandtOD

D. tRCandtWC

99.Forthegivencircuit,whichof thefollowingiscorrect?

A. Thenumber5 isbeingwrittentothememoryataddresslocation203.

B. Thechiphasnotbeenenabled,sincetheEN terminalis0;therefore,nothingwill bewritten tothechip andtheoutputistri-stated.

C. Decimal10isbeingwrittenintomemorylocation211.

D. Theread/writelineisLOW;therefore,decimal5 isbeingstoredatmemorylocation211.

100.What isthesignificanceof theinvertedtrianglesontheoutputsof thedeviceinthegivenfigure?

A. Theyrepresentinvertersandmeanthattheoutputsareactive-LOW.

B. Theyrepresentbuffersandmeanthattheoutputscan drive40TTLloads,insteadof the normal10.

C. Itmeansthattheoutputswill beactiveonlyifa changehasoccurredatthatmemory locationsincethelastread/writecycle.

D. Theoutputsaretristated.