TEM/TPS NCR Report

NCR / Item Description / Serial # / Description of NonConformance / Disposition / Resolution / Status
00299 / TEM Box Assy / All / IS: TEM Box have incorrect connector reference designators.
S.B.: TEM box base drawing LAT-DS-00554 should show correct reference designators. / Rework / Used Brady labels with kapton tape overlay to remark ref. designators to revised drawing / CLOSED
00348 / TEM/TPS GLAT 1753 / All / IS: During T/V test of GLAT 1753, Tracker bias 1 and 0 voltage and Tracker Bias current are out of tolerance during hot thermal cycle performance testing per LAT-TD-03631-04. Measured Bias 1 voltage ranged from 133.2 to 135.58 V, measured Bias 0 voltage ranged from 117.4 - 119.49 V, measured Bias current was 0.0029A during 4 hot soak temperature testing. Ambient and cold temperature soak testing was OK.
S.B.: Within ranges specified in performance test procedure LAT-TD-04085 rev. 3. Bias 1 voltage range is 145 - 165 V, Bias 0 voltage range is 130 - 150 V, Bias current range is 0.0030 - 0.0045 A / Documentation Change / MRB concurred to change range of TKR Bias voltages and current in LAT-TD-03631. / CLOSED
00386 / TEM CCA / GT 105, 106, 107, 108 / IS: 25G shock indicators were tripped on receiving qty = 4 TEM CCAs for pre conformal coat testing at SLAC
S.B.: Not tripped / Use-as-is / 25G and 50G shock monitor trips do not require overstress analysis per John Ku / CLOSED
00393 / TPS CCA / GLAT1774 (GT104) / IS: During testing with LAT-TD-04850, TPS EICIT, all the CAL Bias measurements to pin 12, in step 5.2.3.2-1, were ~175K
SB: Greater than 200K. / Rework / Diode was R&R; then observed that diode is sensitive to light. Perform all future TPS testing with lid on. / CLOSED
00397 / TEM/TPS Package / GLAT1752,1753, 1754 / Issue:
Oscillation of CAL-3.3V Digital when TEM/TPS tester board is connected. Amplitude around 100mV, 1-2KHz frequency.
Oscillation is triggered at power-on of calorimeter and sustained. No oscillation is present when turning the power on at cold tempeartures (-40C). At room-temperature oscillation might or might not be triggered by power-on. At hot temperatures (+50C) oscillation was always triggered at power-on. / Rework / MRB concurred with TPS board design changes. Design change was verified on TPS from GLAT 1754 (Qual). All TPS boards to be reworked per revised CCA drawing.
TPS units on GLAT 1752 and GLAT 1753 installed in GRID to be removed and reworked per NCR / OPEN
Pending Systems Engineeringapproval of technical memo from ELX defining TEM/TPS power on conditions to avoid initiating oscillations
00399 / TPS Subassembly
EICIT / GLAT1774, 1775, 1776, 1778 / IS: Redlines required in TPS EICIT procedure LAT-TD-04085 during test
/ Documentation Change / Documents revised and released / CLOSED
00400 / TPS Subassembly SVT / GLAT1774, 1775, 1776, 1778 / IS: Redlines required in TPS SVT procedure LAT-TD-04849 during test
/ Documentation Change / Revised and released document / CLOSED
00436 / TEM and TPS CCAs / GT104 thru GT122 / IS: Arathane 5750 A/B used by vendor (General Technologies) to conformal coat TEM and TPS CCAs has shelf life that expired on 3 April 2005
S.B.: Shelf life not expired / Documentation Change / MUA #003 approved by GSFC to extend shelf life three months; GT received new material in June 2005 / CLOSED
00481 / EGSE cable for TEM/TPS assy T/V test / GLAT1833 / TEM voltage 0 readout is failing (read value close to 0V) at temp. under 20C. TEM has two voltage outputs to PDU (primary and redundant). Primary output readout is failing at temp under 20C, probably due to bad connections along the way from TEM through TPS and test chamber to EGSE readout. Actual location of failure will be found after completion of TV test. / Use-as-is / Proceed with T/V test using redundant output reading. Loose connector observed when chamber was opened. Connector was not attached with screws. / CLOSED
00482 / TEM/TPS assy, T/V test / GLAT1833/GLAT1834 / IS: During TV acceptance test (LAT-TD-03631-08) TV chamber vacuum at the end of bake out was 6.7x10-5 Torr
S.B.: At least 5x10-5 Torr per procedure to end bakeout. / Use-as-is / Proceed with T/V test. / CLOSED
00545 / TEM/TPS assy / see below / IS: TEM/TPS assemblies were tested for less than the 150 hours of failure free power on time prior to delivery to LAT integration per LAT-MD-00408 para. 7.1.2.9.
S.B.: TEM/TPS assemblies tested for at least 150 failure free powered on hours prior to delivery for LAT integration / Use-as-is / Updating data packages with actual powered on hours / OPEN
Pending Systems Engineering approval to use-as-is

7/19/05