ECE 477 Digital Systems Senior Design Project Fall 2007
Homework 6: Printed Circuit Board Layout Design Narrative
Due: Friday, October 5, at NOON
Team Code Name: __μ[sic] ______Group No. __5___
Team Member Completing This Homework: ____Wesley Allen ______
e-mail Address of Team Member: _____wnallen____ @ purdue.edu
Evaluation:
SCORE
/DESCRIPTION
10 /Excellent – among the best papers submitted for this assignment. Very few corrections needed for version submitted in Final Report.
9 /Very good – all requirements aptly met. Minor additions/corrections needed for version submitted in Final Report.
8 /Good – all requirements considered and addressed. Several noteworthy additions/corrections needed for version submitted in Final Report.
7 /Average – all requirements basically met, but some revisions in content should be made for the version submitted in the Final Report.
6 /Marginal – all requirements met at a nominal level. Significant revisions in content should be made for the version submitted in the Final Report.
* /Below the passing threshold – major revisions required to meet report requirements at a nominal level. Revise and resubmit.
* Resubmissions are due within one week of the date of return, and will be awarded a score of “6” provided all report requirements have been met at a nominal level.
Comments:
Comments from the grader will be inserted here.
1.0 Introduction
The μ[sic] system is a multi-component system designed to simplify the storage, transfer, and playing of music. μ[sic] users will be able to play music off of a wireless portable media drive through a base station, removing the hassle of wires and discs. In this system, files are stored in mp3 format on the pocket-sized portable media drive. The base station will recognize all μ[sic] portable media drives in range via Bluetooth wireless technology and will automatically compile a list of available songs. The user can then play specific songs from the conglomerate library or simply shuffle through the songs. The songs will be transferred from the media drive via Bluetooth to a cache on the base station from which the decoded audio will be output to a analog audio line out.
The layout of the PCB for both the base station and portable drive components of the system are vital for the success of the project. In order for the Bluetooth modules to work appropriately, decoupling between the RF and digital circuits must be addressed. Furthermore, the base station will have analog, digital, and RF sections which should be separated both physically and electrically. In general, EMI and coupling issues need to be considered and appropriately handles, be that through minimizing power-ground loop area or perpendicular line crossings. A high attention to detail in the layout is especially important in the portable media drive due to its small size; small PCB dimensions will need to be maintained while adhering to design considerations.
2.0 PCB Layout Design Considerations - Overall
In general, due to the nature of our design, component and line placement needs to be meticulously thought out. The μ[sic] project involves analog, digital, and RF components. When placed on the PCB, the different signal types will have zones delegated to them, separated from the other signal zones. In addition, each zone will be powered by completely isolated power and ground lines, to meet up only at the output of the regulator. Where complete isolation between zones can not be accomplished (for example, the DAC has digital and analog I/O), components will be placed on the borders between the applicable zones, pulling in power and ground appropriately.
The Bluetooth modules are of dire importance for this project. In order to decouple the RF from the rest of the circuit, a ground “plane” will be placed between the RF zone and the rest of the circuitry. The module itself will be placed at the edge of the PCB, giving it greater transmission range and minimizing near-field coupling with other signal lines. Specifically, the area near the antenna of the Bluetooth module (a surface mount chip antenna) will be clear of any and all signal lines, ground lines, and stray metal.
When the portable media drive module size constraint was first being developed, the dimensions of the “major” components were taken into account. Discrete, minor, components however, have shown themselves to be a much larger area hog than anticipated. To curtail this issue, discrete components will be placed on the bottom plane of the PCB (opposite the major components) whenever possible. This also assists in drawing bypass capacitors closer to their respective pins, minimizing the inductance between them (though the vias themselves will have a finite inductance).
To minimize inductance and resistance while increasing line capacitance, power and ground traces will be designed as wide as physically possible. They will also be placed in close proximity and parallel to one another to limit EMI. To minimize ground bouncing in digital zones, ground line lengths will be minimized, even if this means sacrificing the previous constraint. Signal lines will also be kept a reasonable width when possible (at least 250 micron) and separate from each other. Doing so should help prevent manufacturing errors such as shorts and line breaks. High speed digital lines, such as the SPI lines, will be separated from mission critical lines such as the microcontroller reset signal, voltage regulator shutdown signal, and Bluetooth reset signal to prevent line coupling which could cause system failure.
3.0 PCB Layout Design Considerations - Microcontroller
An Atmel Mega 644 and Atmel C51 microcontroller are used for the portable drive and base station, respectively. Of the two, the Mega 644 has an internal oscillator and PLL while the C51 requires an external crystal oscillator circuit [1-2]. A 20MHz crystal will be used and two 10pF capacitors will be placed between the crystal pins and ground per the C51 datasheet’s recommendation [2]. The oscillator circuitry will be laid out similar to the recommendation in [3], sans the external resistor. It will be place immediately next to the microcontroller on the PCB.
The C51 and Mega 644 microcontrollers have ATD converters onboard. However, our project will not be utilizing these functions. Because of this, the analog VDD and GND pins will be tied to the digital VDD and GND lines and will not be powered off of separate VDD and GND rails. Due to the sensitive nature of the SPI clock line coming from the microcontrollers and its increased ability to couple with other lines, every effort will be made to place it away from and perpendicular to other signal lines, though this will not be possible immediately at the pin itself.
Both microcontrollers have pins that are unutilized. If the pins are input pins and are not being brought to a header, they will be tied to ground to assure noise is not induced on the pins leading to incorrect readings on other, close proximity, pins. Pins which have a pushbutton interface will either use a 10K pull-up or 10K pull-down resistor depending on if the pins are active-low or active-high.
To make sure the microcontrollers can obtain instantaneous current draw when needed, 10uF 1206 size bypass capacitors will be used. As mentioned previously, these will be placed immediately below the VDD pins on the bottom of the PCB. This close proximity will help provide short bursts of current without a long line of inductance between the capacitor and the pin.
4.0 PCB Layout Design Considerations - Power Supply
The power supply circuit for the handheld consists of a battery charger, battery, and DC step-down converter. Immediately at the output of step-down converter a tantalum electrolytic bulk capacitor will placed between VDD and GND. The datasheet recommends a 100uF capacitor and that is the size we will be using [4]. In addition a smaller 10uF ceramic capacitor will be placed at the same terminals to decouple high-frequency noise.
The power supply circuit for the base station is a 5V wall-wart plug and a MAX1818 3.3V linear regulator. 5V, unregulated, will be used to power the LCD backlight. The regulated power will again utilize bulk capacitor at the VDD and GND terminals as well as a smaller decoupling ceramic capacitor.
As mentioned previously, ground and power planes will be parallel and in close proximity to one another to minimize EMI on those rails. Additionally, the GND line length will be minimized to as short as possible to minimize inductance and resistance, thus minimizing ground bouncing. Also mentioned previously were bypass capacitors. 10uF ceramic capacitors will be placed at all VDD pins of the ICs in our design.
5.0 Summary
The PCB layout for the μ[sic] system is the most important aspect of the hardware design of the project. Choosing the right components does no good if the PCB can’t accommodate the system. Special consideration is taking in the PCB design to minimize EMI, noise, signal coupling, and provide the system an optimum environment in which to operate. Due to the tri-signal nature of our project, physical and electrical separation of the analog, digital, and RF zones is paramount. Maximum RF efficiency is taken into account as well; wireless transmission of information is a key part of this project.
List of References
[1] Atmel Corporation, ATmega644 Datasheet
http://atmel.com/dyn/resources/prod_documents/doc2593.pdf
[2] Atmel Corporation, AT8xC51SND1C Datasheet
http://www.atmel.com/dyn/resources/prod_documents/doc4109.pdf
[3] System Design and Layout Techniques for Noise Reduction in MCU-Based Systems
http://cobweb.ecn.purdue.edu/~dsml/ece477/Homework/CommonRefs/AN1259.pdf
[4] Maxim Integrated Products, MAX710 Data Sheet
http://datasheets.maxim-ic.com/en/ds/MAX710-MAX711.pdf
-1-