Faculty of Computer & Information Technology
Year: 2013/2014 / Department of Computer Engineering / First Semester
Course Information
Course Title / Digital Logic Design
Course Number / CPE 231 (3-0-3)
Prerequisites / CS 112: Introduction to Programming
Course Website / http://elearning.just.edu.jo/
Instructor/Coordinator / Eng. Mohammed Al-Hammouri
Office Location / Ph1-L0
Office Hours / Sun, Tue, Thr: and Mon, Wed: or by appointment
E-mail /
Assistants / TBA
Catalog Description
Binary systems; Boolean algebra and logic gates; Simplification of Boolean functions; Combinational logic; Design of combinational logic with MSI, LSI, programmable logic devices, and hierarchical logic design; Sequential logic; Registers, counters, and memory units; Computer-aided design and logic simulation.
Text Book
Title / Digital Design
Author(s) / M. Morris Mano and Michael D. Ciletti
Publisher / Prentice Hall
Edition / Year / 4th edition / 2007
References / “Digital Design: Principles and Practices”, John F. Wakerly, Prentice Hall.
“Computer Engineering Hardware Design”, M. Morris Mano, Prentice Hall.
“Fundamentals of Logic Design”, Charles Roth, Jr., Brooks Cole.
Assessment Policy
Assessment / Date and Location / Weight
First Exam / TBA / 25%
Second Exam / TBA / 25%
Quizzes / TBA / 10%
Final Exam / Scheduled by Registrations Office. / 40%
Total / 100%
Course Objectives / Weight
This is the first course in computer hardware design, which covers the fundamentals of digital logic design and switching theory. During the course, the student is expected to learn about the following:
1. Number systems, binary systems, base conversion, representation of numbers and characters using binary codes, and binary arithmetic. / 10%
2. Boolean algebra and its laws, axioms, theorems, and operations. / 5%
3. Manipulation and simplification of Boolean algebraic expressions and functions using Boolean theorems and K-maps. / 15%
4. Combinational devices such as multiplexers, decoders, and adders. / 10%
5. Analysis and design of combinational circuits using basic gates and/or combinational devices. / 20%
6. Latches and flip-flops (SR, JK, D, and T). / 10%
7. Analysis and design of synchronous sequential logic circuits. / 20%
8. Registers and counters: Their design and use in implementing specific operations. / 10%
Teaching & Learning Methods
Pay attention to the following issues to make the teaching and learning processes successful:
§ Resources: textbook, references, class lectures, lecture notes, and other resources such as the web.
§ Comprehension: attendance, class participation, and weekly preparation are your way to success.
§ Responsibilities: keep an eye on what the class is covering, be alert for the announcements, watch your performance and see your instructor in the office hours if needed and don’t delay things.
§ Communication: sort out your problems and concerns with the instructor as soon as possible either in the class, in office, or by email if necessary.
§ Grading: there will be no grade curving or bonuses in both midterm exams. The exams are designed in such a way to allow a student to achieve excellent grades if he/she studies sufficiently and thoroughly.
Learning Outcomes:
Upon successful completion of this course, students should:
Related Objective / Learning Outcomes / Reference(s)
1 / Have an overview of digital systems and their applications. / Ch.1 in textbook
1 / Have a thorough understanding of different numbering systems (with emphasis on the binary, decimal, octal, and hexadecimal systems) and be able to convert from one base to another. / Ch.1 in textbook
1 / Understand how signed numbers, unsigned numbers, and alphanumeric characters are represented in binary. / Ch.1 in textbook
1 / Be able to perform binary arithmetic / Ch.1 in textbook
2 / Comprehend the basic definitions, axioms, and theorems of Boolean algebra. / Ch.2 in textbook
3 / Be able to manipulate and simplify Boolean algebraic expressions and functions of different forms. / Ch.2 in textbook
2,3 / Understand the basic logic operations and gates. / Ch.2 in textbook
3 / Be able to use Karnaugh maps to minimize Boolean expressions and functions. / Ch.3 in textbook
3,5 / Be able to analyze and design digital combinational circuits using basic gates (AND, OR, NOT, NAND, NOR, XOR). / Ch.3 in textbook
4 / Understand the design and operation of decoders, encoders, multiplexers, comparators, adders, and subtractors. / Ch.4 in textbook
5 / Be able to analyze and design combinational logic circuits using decoders and multiplexers. / Ch.4 in textbook
6 / Understand the design and operation of different latch and flip-flop types (SR, JK, D, and T). / Ch.5 in textbook
7 / Be able to analyze and design clocked synchronous sequential circuits. / Ch.5 in textbook
8 / Understand the operation and be able to design different types of registers and counters using flip-flops. / Ch.6 in textbook
8 / Be able to configure registers and counters for different applications. / Ch.6 in textbook
Course Content
Weeks / Topics / Readings
1 – 3 / Binary Systems / Ch.1 in textbook
4 – 5 / Boolean Algebra and Logic Gates / Ch.2 in textbook
6 – 7 / Gate-Level Minimization / Ch.3 in textbook
8 – 10 / Combinational Logic / Ch.4 in textbook
11 – 13 / Synchronous Sequential Logic / Ch.5 in textbook
14 / Registers and Counters / Ch.6 in textbook
15 – 16 / Review and Evaluation / Exams and Quizzes
Essential Notes
Exams / § May include: analysis, design, operation tracing, problem solving, and descriptive formats.
§ Use your own tools only: pens ...etc
§ No calculators will be allowed.
§ Instructions on the first page of the exam are very important.
§ Not abiding by the rules is a reason for dismissal from the exam.
Additional Notes
Makeup Exams / § Makeup exams are not given unless there is a valid excuse accepted by the dean submitted within 2 weeks of the missed exam’s date.
Drop Date / § Check the Records and Registration office.
Cheating / § Standard JUST policy will be applied.
§ If your cell phone is found not to be turned off during the exam, you will be suspected of attempting to cheat.
Attendance / § Excellent attendance is expected.
§ JUST policy requires the faculty member to assign a ZERO (35%) if a student misses 10% of the classes without an acceptable excuse accepted by the dean.
§ Attendance will be taken by calling names or by passing around an attendance sheet.
§ If you miss a class, it is your responsibility to find out about any announcements or material you may have missed.
Workload / § Average work-load student should expect to spend 8 hours/week on the course (excluding lecture time)
Graded Exams and Quizzes / § Graded exam papers and quizzes will be returned within a week.
Participation / § Participation in the class will positively affect your performance.
§ Disruption and side talks will possibly result in dismissal from class.
§ Turn off your cell phone before you come to class.
Prepared by: Dr. Khaldoon Mhaidat Modified by: Dr. Moath Jarrah Last Modified Date: Feb 7th 2012
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