COURSE SYLLABUS – IC 541CA

TV Program

Cal VIEW

205 McLaughlin

College of Engineering

University of California

Phone: (510) 642-5776

Fax: (510) 643-5877

Fall 2001

Consultant: Mike Sheets

Office Hours: TBA

E-mail address: eley.edu

Phone: (510) 642-5776

Fax: (510) 643-5877

Updated 7/30/2001 1

COURSE SYLLABUS – IC 541CA

NATIONAL TECHNOLOGICAL UNIVERSITY

IC 541CA –Fall 2001 - 4 Units

Digital Integrated Circuits

Professor Jan Rabaey

(UC Berkeley EECS 141)

Textbooks

1)  Rabaey, J. Digital Integrated Circuits: A Design Perspective. Prentice Hall, Inc., 1996.

2)  Rabaey, J. Digital Integrated Circuits: A Design Perspective DRAFT CHAPTERS 1-6. Unpublished, 2000. Available in course reader.

Course web site

http://bwrc.eecs.berkeley.edu/Classes/ICDesign/ic541ca_f01/

Lecture Schedule

Special Note: This syllabus reflects the sequence of lectures as it was videotaped in the Fall of 2000.

TBA Conference Call: There will also be a conference call with Prof. Rabaey at some point during the semester. Details will be provided when available.

TBA Conference Call Sign-Up: You MUST call the Cal VIEW office at (510) 642-5776 to sign up for the introductory conf. call with Mike on Aug. 29.

Tues, August 28 Lecture #1 – Course Introduction

Tues, August 29 MANDATORY Introductory Conference Call: with Mike from 10-11am PDT.

Thurs, August 30 Lecture #2 – Design Metrics

Mon, September 3 Labor Day Holiday

Tues, September 4 Lecture #3 – CMOS Inverter

Thurs, September 6 Lecture #4 – IC Manufacturing and Design Rules

Fri, September 7 HOMEWORK #1 DUE: must be postmarked by 9/7.

Tues, September 11 Lecture #5 – Voltage Transfer Characteristic

Thurs, September 13 Lecture #6 – MOS Capacitances & Prop Delay

Fri, September 14 HOMEWORK #2 DUE: must be postmarked by 9/14.

Tues, September 18 Lecture #7 – Power Consumption & Technology Scaling

Thurs, September 20 Lecture #8 – Wire Models

Fri, September 21 HOMEWORK #3 DUE: must be postmarked by 9/21.

TBA Conference Call Sign-Up: You MUST call the Cal VIEW office at (510) 642-5776 to sign up for the conf. call with Mike on September 26.

Tues, September 25 Lecture #9 – Wire Models

Wed, September 26 Exam Conference Call: with Mike from 10-11am PDT for Exam 1 review/questions

Thurs, September 27 Lecture #10 – Complementary CMOS Logic Design

Fri, September 28 HOMEWORK #4 DUE: must be postmarked by 9/28.

TBA Conference Call Sign-Up: Please call the Cal VIEW office at (510) 642-5776 to sign up for the conf. call with Prof. Rabaey on TBA.

Week of October 1-5 MIDTERM EXAM #1 DUE: must be postmarked by 10/5.

Tues, October 2 Lecture #11 – Complementary CMOS Optimization

Thurs, October 4 Lecture #12 – Low Energy Design + Ratioed Logic Design

TBA Conference Call Sign-Up: You MUST call the Cal VIEW office at (510) 642-5776 to sign up for the conf. call with Mike on October 10.

Tues, October 9 Lecture #13 – Pass-transistor Logic Project Launch

Wed, October 10 Project Conference Call: with Mike from 10-11am PDT for project questions/discussion

Thurs, October 11 Lecture #14 – Dynamic Circutis

Thurs, October 12 HOMEWORK #5 DUE: must be postmarked by 10/11.

Fri, October 13 Columbus Day Holiday (note: HW is due on the 12th)

Tues, October 16 Lecture #15 – Dynamic + Low-energy Design

Thurs, October 18 Lecture #16 – Sequential Circuits Latches and Flip-flops

Fri, October 19 HOMEWORK #6 DUE: must be postmarked by 10/19.

TBA Conference Call Sign-Up: You MUST call the Cal VIEW office at (510) 642-5776 to sign up for the conf. call with Mike on October 24

Tues, October 23 Lecture #17 – Sequential Circuits Latches and Flip-flops

Wed, October 24 Exam Conference Call: with Mike from 10-11am PDT for Exam 2 review/questions.

Thurs, October 25 Lecture #18 – Sequential Circuits Multi-vibrators

Fri, October 26 HOMEWORK #7 DUE: must be postmarked by 10/26. PROJECT PHASE #1 DUE: must be postmarked by 10/26.

Sun, October 29 (2 am) Daylight Savings Time ends (Fall back). All remaining conference calls are at 10am PST

Week of October 29-November 2 MIDTERM EXAM #2 DUE: must be postmarked by 11/2.

Tues, October 30 Lecture #19 – Review for Midterm #2

Wed, October 31 Halloween Holiday

Thurs, November 1 Lecture #20 – Arithmetic

Tues, November 6 Lecture #21 – Arithmetic

Thurs, November 8 Lecture #22 – Interconnect-Capacitive

Fri, November 9 HOMEWORK #8 DUE: must be postmarked by 11/9.

Mon, November 12 Veterans Day Holiday

TBA Conference Call Sign-Up: You MUST call the Cal VIEW office at (510) 642-5776 to sign up for the conf. call with Mike on November 14.

Tues, November 13 Lecture #23 – Interconnect – Resistive

Wed, November 14 Project Conference Call: with Mike from 10-11am PST for project questions/discussion

Thurs, November 15 Lecture #24 – Interconnect + Timing

Fri, November 16 HOMEWORK #9 DUE: must be postmarked by 11/16.

Tues, November 20 Lecture #25 – Timing + Memory

Wed, November 21 Lecture #26– Semiconductor Memory

Thurs. November 22 Thanksgiving Holiday

TBA Conference Call Sign-Up: You MUST call the Cal VIEW office at (510) 642-5776 to sign up for the conf. call with Mike on November 30.

Tues, November 27 Lecture #27 – Overview and Discussion

Wed, November 28 Exam Conference Call: with Mike from 10-11am PST for Final Exam questions/discussion

Fri, November 30 HOMEWORK #10 DUE: must be postmarked by 11/30. PROJECT PHASE #2 DUE: must be postmarked by 11/30.

Week of December 3-7 FINAL EXAM DUE: must be postmarked by 12/7.

Updated 7/30/2001 4