COLDFIRE 2001 Millennium Mission

Fortnight 6FEB01-19FEB01

CPSC 483 Section 501

February 5, 2001

Project Staff:

Josh Hudgins

RandyJedlicka

Drew Larson

Progress

A majority of the time for the past two weeks has been spent on continued research, evaluation, and design. Due to the substantial progress, the PCB will be sent off for fabrication in less than two weeks.

Individual Progress

Drew

  • Continued exhaustive search of Florida’s site for further information concerning the development cycle for COLDFIRE system.
  • Discovered and contacted PCB manufacturer that Florida uses. Found “red flag.” (See below)
  • Unsuccessfully tried to circumvent PROTEL’s copyright protection for several hours.
  • Unsuccessfully attempted to install PROTEL on a computer without correct access rights.
  • After PROTEL was installed by TA, became familiar with PROTEL by reviewing tutorials, examining reference guide, doing LAB0 from old group 5, and simply using the program.
  • Confirmed with Mr. Hudgins as to the ease of use of PROTEL.
  • Confirmed with Mr. Jedlicka as to the Flash Memory Problem. Agreed to find new FLASH. Unsuccessfully searched for new Flash with larger construction.
  • Compared Labs of Legendary “Group 5”, Florida’s Group, and the PowerPC group. Confirmed need for development of extra labs (i.e. Networking labs, etc)

Josh

  • Opened Legendary “Group 5” board design up in Protel and reviewed all the schematics, and familiarized myself with Protel.
  • Did research with Randy on which Coldfire processor we needed when considering possible network applications.
  • Did research on what kind of ROM was needed and how it would affect the existing schematics. Decided on a 1MB Intel Flash memory that fit our power and memory requirements.
  • Did research into the timing considerations of the various memory components and the ColdFire processor.

Randy

  • Researched the Wind River website for VxWorks documentation and obtained:
  1. VxWorks Programmer’s Guide
  2. VxWorks Reference Manual
  • Researched the Motorola website for Motorola Coldfire processor, MFC5206, documentation and obtained:
  1. MFC5206 Features
  2. MFC5206 Pin Out Diagram
  3. MFC5206 User Manual
  4. MFC5206 Programmer’s Reference Manual
  • Looked into adding Networking capabilities to the design:
  1. Found a helpful 10/100 Ethernet schematic diagram to provide ideas
  2. Decided to continue research and design efforts before committing to a specific design of the network capabilities
  • Found the Flash ROM that will be used in the design with the help of Josh.
  • Discussed the requirements of the Flash memory with Drew and Dr. Mahapatra before searching for it.

Modifications

Several modifications have taken place since the development of the initial proposal. Almost all of them have come about through serious research and group discussion.

Minor

  • Addition of Networking Lab to Manual.
  • Addition of Larger Memory (1MB) requires some changes to the address line layouts in PROTEL.
  • PCB will be limited to 2-layers (front and back) by manufacture.

Major

  • Addition of Networking capabilities to PCB design
  • Replaced DA28F32055 Flash Memory with TB28F800B5B90. This is due to the physically small size of the original Flash Memory.

New Documentation

There has been an extremely large amount of documentation discovered. Most of these are technical manuals with in excess of seventy pages, and thus not appropriate for here. However, the only diagram of immediate value is given below. This is the pin-out for the Flash Memory Module that we will be purchasing.


New Ideas

After discussing with Dr. Mahapatra, it seems as though introduction of networking capabilities is needed. This will lead to the development of more labs, and increased education for the end user.

Currently examining the Boot Block Flash Memory system. This system will divide the memory into blocks that will maintain the integrity of the boot software.

The Next Fortnight

  • Completion of PCB design is the next big goal. A few things will have to be altered and redesigned. The memory system needs to be rerouted as well as the data bus. The “two-layer/four-layer” problem must be solved. This will probably be our biggest problem as this is where Legendary Group 5 had difficulties.
  • All parts must be ordered and purchased.
  • All group members will continue to research and familiarize themselves with PROTEL and VxWorks.
  • All group members will continue to examine old designs of Legendary Group 5.

Red Flag Items

Obstacles

After talking to the PCB manufacturer, it seems as though the only boards they create are 2-layers (front and back). Therefore, it is a given that the PCB design must only be 2 layers thick. Due to the past problems with PROTEL, this may be a big problem for the team. If trouble arises, Dr. Yeary, of the Electrical Engineering Department, will be contacted for help. Also on the list of helpful contacts, Jeff Webb may be reached as well.

Progress Status

The project matches exactly with our intended schedule. As long as no problems with PROTEL arise, everything should flow fairly smooth for the remainder of this term.

Chemistry

The passion of each group member for the project has lead to an enormous bonding experience. Perhaps the project is just the catalyst needed to spark some life long relationships. This reaction is definitely exothermic and heating up.

Instructor/TA

Dr. Mahapatra has been quite helpful in steering the ship which we are sailing upon. He has pointed out things which we should consider to make our project more useful, robust, and better. These include the networking introduction and the new choice for FLASH memory.

Mr. Sims has aided by providing an encouraging environment with which our project can thrive in. This includes the installation of PROTEL, and the setting up of an account on CHEF. Also, Mr. Sims has been quite helpful in the area of the telecommunications industry.