Gated Current IntegRator for the beam in

the RR barrier Buckets

A.Cadorna, C.M. Bhat, J. Crisp, B. Fellenz Fermi National Accelerator Laboratory (FNAL) *, Batavia, IL60510, USA

MI Note 289

The idea of using a gated current integrator originally started from SBI which is being used to measure the bunch intensities of coalesced bunch in MI at 150 GeV. Brian Fellenz and Chandra worked on this instrumentation and used to measure the beam intensity in barrier bucket in RR (refer MI Note 287). The device developed here is much more simple and supposed to give more accurate results.

Abstract

At the Fermilab Recycler Ring (RR), the antiproton (pbar) beam will be stored azimuthally in different segments created by barrier buckets. The beam in each segment may have widely varying intensities. We have developed a gated integrator system to measure the beam intensity in each of the barrier bucket. Here we discuss the design of the system and the results of beam measurements using the integrator.

Introduction

Equipped with a wide-band RF system to create barrier buckets of any shape, the Fermilab RR[1] is an 8GeV permanent magnet antiproton storage ring. These barrier pulse[2] have a 2kV pulse height and a 908nsec pulse width (48, 53 MHz RF buckets). Furthermore, the positions of the barrier pulses are determined by RR LLRF arbs settings[3]. Consequently, during stacking and un-stacking of the beam (protons or anti-protons), they are moving but are fixed during cooling.

The Gated Current Integrator (GCI) measures the proton and antiproton beam intensity in RR barrier buckets during stacking, un-stacking, and storage. GCI aims to accommodate an intensity range of 1E10 to 4E12, with 10% or better accuracy at the lower limit and 2% or better at the higher limit.

GCI SYSTEM ARCHITECTURE

The GCI system prototype integrates the total area under a gated wall current monitor (WCM) signal to determine the beam intensity. Essentially, the system can be divided into five basic modules. The first three are shown below.

Figure 1 : First 3 stages of GCI system prototype

The first stage receives a WCM signal transmitted over twin-ax cable. This signal passes through a common-mode choke to filter any additive noise induced over the transmission lines, an impedance matching network to handle cable termination and reflections, and then a differential receiver amplifier. This differential-to-single-ended amplifier is characterized to have a high common-mode rejection ratio (70dB @10MHz). This minimizes the corruption by external noise sources or crosstalk. The amplifier also has tuneable gains to adjust for losses in the transmission lines or for different full-scale intensity ranges.

The second stage addresses the slow drifting baseline shift of the WCM signal. It is composed of a sample-and-hold (S/H) amplifier and a differential amplifier. Due to the rise and fall characteristics of the barrier buckets’ separation, 250 nsec is needed to acquire and sample the baseline between integrations. Further, the S/H amplifier is characterized with a slow 0.02µV/µs droop rate, allowing the sampled baseline to be held steadily. Once sample, the baseline is subtracted from the original WCM signal using a differential amplifier. The differential input range of the differential amplifier must accommodate differences between peaks in the beam bunches and the baseline.

Next, this baseline-corrected signal is feed into the integrator in a switched-capacitor configuration. The time constant determined by the feedback resistor and capacitor needs to be much greater than the typical gate width. This minimizes the intrinsic exponential droop error of non-ideal integrators during the hold state. In addition, errors due to noise also vary proportionally to the square root of the gate width. Serving as an input buffer to the A/D converter, this amplifier has a fast settlings time (90nsec to 0.1%) as well as a high slew rate (230V/sec uncompensated).

The integrated signal is then passed to the next stage, where is it converted to a digital 16-bit equivalent (A/D) and then back to analog (D/A). With a 250 kHz sampling rate, the A/D acquisition and conversion time is at most 4µsec. The 16-bit D/A has a bipolar output rate of +10V and has a typical settling time for 1 LSB step is 2.5µsec.

Finally, the output analog signal is put through a non-inverting unity operational amplifier. This low noise op-amp has a maximum offset voltage drift of 0.1µ/ºC and a maximum offset voltage of 25µV at 25ºC. This eliminates the need of external offset voltage adjustments and increases system accuracy over temperature.

GCI System TIminG

Figure 2 : Timing schematic for various gates

The GCI system prototype requires a set of digital signals from the control system: S/H Gate, Integrator-1, and Integrator-2. Timing schematic for various gates used in RR relative to the barrier rf signals and the beam pulse are shown in figure.1. inally, the outputted

S/H Gate is a high pulse trigger control and decides when to sample the baseline. Though it is independent of the other two signals, it is best to sample the baseline just when the integrator is resetting before integration. This will minimize the droop during the hold mode of the S/H amplifier.

Figure 3 : WCM beam signals and various gates

Integrator-1 and Integrator-2, both high pulses, together control an adjustable integration window. The rising edge of Integrator-1 provides the beginning of the beam integration while the rising edge of Integrator-2 marks the stop of the beam integration. This resulting gate triggers a Altera FLEX 10K field programmable gate array (FPGA) to generate signals controlling the switching action for the integrator’s three modes: INTG, which lasts as long as the gate, HOLD, which is after INTG lasting the duration for the A/D conversion, and then RESET, occurring between HOLD and the next INTG.

A timing circuit is also programmed into the FPGA to generate the correct handshaking signals needed to coordinate the A/D and D/A conversions.

Figure 3 shows the scope picture during setting up of various gates to measure the integrated injected beam in to the Recycler Ring. The data shown here is for four 2.5MHz bunches at the time of injection.

Gate settings in RR

Exact positions of various GCI gates are highly critical for accurate beam intensity measurements in RR. The RR many have pbar beam in three different regions as shown in figure 4 with different energy spreads. Besides, for optimum use of the RR azimuth space, two barrier pulses may be back to back during storage of the beam. This requirement demands that the ON of S/H-gate must align with beginning of –ve barrier pulse as shown in figure 2. The ON of Ingetrator-1 is set at 250ns (minimum width of S/H-gate) from the beginning of the barrier pulse. This implies that the present GCI system is capable of measuring the intensity for a beam with maximum E<30.6MeV(assuming the beam is contained in a rectangular barrier of 2kV pulse height and 908ns pulse width).

Figure 4 : A typical RR beam segments. RF wave (top trace) and beam segments (bottom trace).

Calibration and Beam Measurements

The GCI system is calibrated by two methods. The first calibration is carried out on a test stand using an external current source and the corresponding response is measured.

Further calibration is done by recording the GCI response as a function of the Recycler Ring DCCT for the beam in barrier bucket of fixed size. The beam intensity measured using DCCT is known to better than 0.5%. The correlation between DCCT output and the GCI output is shown in figure 5.

We have also recorded the GCI response as a function of DCCT for varied barrier bucket width. This distribution found to be flat for a fixed amount of beam.

Figure 5 : RR GCI vs RR DCCT response

In future we plan use more than one GCI systems in the RR to measure the stored beam in more than one barrier buckets and the beam in the extraction region. This would help us to measure the injection and extraction efficiencies.

A device similar to this was used to make first measurements of longitudinal emittance of the beam in the RR barrier buckets[4] by reducing the barrier pulse height until the beam area matches with that of bucke area. The GCI is used to find out when the beam start leaking out of the barrier bucket. The results of these measurements lead to further investigation of the Main Injector ramp induced longitudinal emittance growth of the Recycler beam.

Our special thanks are due to J.P. Marriner for his inputs and many useful discussions during the course of this work. We also would like to thank Dallas Heikkinen for his help.

References

[1]“The Fermilab Recycler Ring Technical Design Report” G. Jackson, FERMILAB-TM-1991 (1996).

[2] J.E. Dey and D.W. Wildman, IEEE, Proc. the 1999 Part. Accel. Conf. New York, NY, 869, 1999).

[3]Brian Chase and Keith Meisner (private communications, 2003).

[4] “A first measurement of longitudinal emittance of RR beam”,C.M. Bhat, Fermilab- MI Note 287