1
A simple optical patternator for evaluating spray symmetry
by
M.J. Ullom* and P.E. Sojka**
Maurice J. Zucrow Laboratories
School of Mechanical Engineering
Purdue University
West Lafayette, IN 47907-1003
Tel: 765-494-1536
Fax: 765-494-0530
Email:
Review of Scientific Instruments
*Graduate Research Assistant
**Professor and co-director Center for Bio-Sprays
A. Optical Hardware
The patternator consists of a laser source (line generator), focusing optics, a reference detector with associated amplifier circuit and power supply, an array detector with associated hardware, and a data acquisition system (software and hardware). Each is discussed below. Further details can be found in Ullom.1
Coherent Auburn Group produces the Micro VLM laser diode module line generator (model number LG3-30D) used as a light source. It provides a 1 mm wide, 67010 nm, 1.6 mW 5 % nominal sheet that expands at 30 degrees and has a divergence angle less than 1 mrad in the transverse direction. Reference and signal sheets were formed using Edmund Scientific’s 39480 coated pellicle beam splitter (2 m thickness and a flatness of ½.
The collimating and condensing lenses were acquired from Edmund Industrial Scientific (32-509 units manufactured to have a diameter of 152 mm and a focal length of 300 mm) and mounted in Edmund’s 36-474 optical mounts. Custom lens covers were constructed from foam board (available at any graphics arts supply store) to ensure stray reflections were minimized. An iris was mounted between the light source and the first condenser lens to control the light sheet width as it passed through the spray.
Because the light source provided excess power, neutral density filters were required to protect the detectors from saturation. Edmund Scientific 54082 circular neutral density filters were placed in front of both the reference and array detectors.
Hamamatsu manufacturers the Si photodiode (S1226-8BQ) used as the reference detector. It has an active area of 5.5 x 5.5 mm, a spectral range (190 to 1000 nm) that peaks at 720 nm, a photosensitivity of 0.35 A/W at 670 nm, and a rise time of 2 s when operated with a 1 k load and without a reverse bias voltage. It produces a current that is linearly proportional to incident light intensity over a range of 10-12 to 10-2 W.2
The S1226-8BQ was attached to a simple operational amplifier circuit (see Fig. A1) to allow readout over the specified light intensity range. The circuit was designed so that current flowed into the inverting input of the operational amplifier (Analog Devices, AD 549LH); it provided a low input bias current of 40 fA.
A P34-1 998 regulated supply (Polytron Devices Inc.; line regulation of 0.02 %, load regulation of 0.05%, and 1.0 mV RMS ripple and noise) was used to power the AD 549LH. To further reduce noise and fluctuations in the dc power supply, it was isolated from building power by a Tripp-Lite Power Protection Uninterruptible Power Supply (Internet Office 500).
The AD 549LH’s input offset voltage (~0.5mV) was canceled using a 10 k variable resister, as shown in Fig. A1. The non-inverting input of the AD 549LH was connected to the circuit ground, which was common with the data acquisition board’s analog input ground (AIGND). The output signal level was adjusted to a level of approximately 3 V using a 1 M variable follower resistor. To reduce noise, the circuit was shielded using a wire mesh cage that was attached to ground.
Hamamatsu also manufactures the self-scanning N-MOS voltage type linear photodiode array (S3921-128Q). The S3921-128Q consists of 128 pixels, each with a sensitive area of 50 m by 2.5 mm. The detector spectral response ranges from 200 to 1000 nm and peaks around 600 nm.
The S3921-128Q requires a C4074 driver/amplifier circuit and a C4091 pulse generator circuit. Pixels can then be read at a maximum rate of 500 kHz.3
The S3921-128Q uses charge integration to produce a boxcar signal (ACTIVE VIDEO) that is generated as pixels are sequentially sampled. This output signal is not real-time, the amplitude instead being proportional to the product of the light intensity and the pixel integration time.4
The C4091 pulse generator circuit requires a +5 Vdc, 30 mA power supply as an input and produces the master clock pulse, CLK, and the master start pulse, ST, as outputs. These pulses, +5 Vdc in the high position and 0 Vdc in the low position, control the S3921-128Q. Six CLK pulses are required to read one pixel.
Using jumpers, the CLK pulse can be set to the following useful frequencies: 0.09375, 0.1875, 0.375, 0.750, 1.5, and 3 MHz. Higher frequencies are possible, but they are not compatible with the C4074 circuit.
The time between ST pulses is the signal accumulation time, or integration time. Using jumpers on the C4091, the ST pulse interval can be set to the following useful values: 2, 5, 10, 20, 50, 100, 200, or 500 s, 1, 2, 5, 10, 20, 50, 100, 200, or 500 ms, and 1, 2, 5, 10, 20, or 50 s. An integration time of 1 s is available, but it is not useful because it does not allow enough time to read out each pixel.3
The S3921-128Q uses a digital shift register to sequentially read out each pixel on the photodiode array. Fig. A2 shows an equivalent circuit. Fig. A3 shows the timing of the C4091, C4074, and S3921-128Q. The amplifier portion the C4074 performs inverting amplification and offset cancellation on the ACTIVE VIDEO line. The resulting waveform (DATA VIDEO), as seen in Fig. A3, is output to the data acquisition terminal block.
B. Data Acquisition Hardware
The optical patternator’s data acquisition system (National Instruments PCI-MIO-16E-4 multifunction input/output data acquisition card installed in a desktop PC) samples array and reference detectors. The PCI-MIO-16E-4 can sample two channels at 250 kHz (one analog input channel at a time), with 12-bit resolution, a maximum settling time of 8 s 0.5 of the least significant bit (typically 4 s 0.5 LSB), and a slew rate of 20 V/s. The maximum channel scan rate used by the patternator often equals the 16E-4’s maximum rate, as determined by the settling time of the PGIA.4 Fig. A4 shows the corresponding block diagram.
Signals were routed into and out of the data acquisition board using a National Instrument’s BNC-2115 shielded connector block and their SH68-68-D1 shielded cable. To further preserve signal quality each circuit was shielded by either mounting it in a metal box or enclosing it in a fine wire mesh. Cables were similarly shielded. The shielding and all circuit grounds were ultimately routed to the data acquisition board’s analog input ground, AIGND. AIGND is connected directly to the ground tie point on the PCI-MIO-16E-4.6 As a result, both the array and reference detectors are sampled as ground referenced single ended (RSE) inputs without collecting significant common mode voltage or noise.
The range of the signal being measured by the PCI-MIO-16E-4 determines the code width, or smallest detectable change in input, of the analog-to-digital converter (ADC). Since the ADC has 12 bit resolution, the code width for a 0 to 10 V range equals 10 V / 212, or 2.44 mV.6 This range and code width corresponds to a typical output signal from the array detector, and represents the smallest measurable change in pixel exposure.
The PCI-MIO-16E-4 typically uses internal counters to determine the data acquisition rate. The channel clock controls the ADC conversions. The scan clock controls the scan interval. Additional data acquisition control is accomplished using triggers because triggers significantly reduce the amount of data that must be acquired. A post-trigger starts the ADC, but the number of samples saved is counted with respect to a pre-trigger.
While using a pre-trigger does allow collection of samples before the trigger, this collection of samples prior to triggering is not employed. When the data acquisition program is executed, all of the A/D conversions that occur between the first ST pulse (post-trigger) and the first EOS pulse (pre-trigger) are discarded. Only array passes that occur after the first EOS are kept for analysis for the following reason. The data that is collected between the post-trigger and pre-trigger is subject to uncertainty associated with initiating the data acquisition timing; there can be uncertainty of up to one timebase period between the start signal and the first counted edge of the timebase.7 This error most frequently caused the data acquisition system to skip pixel zero on the first detector pass. By discarding the data between the post-trigger and the pre-trigger, counter startup errors are avoided.
The acquisition of array and reference detector signals is controlled using ST, EOS, TRIG (scan clock), and CLK. See Fig. A5. When the data acquisition program runs, the number of scan clock pulses to count is loaded into the acquisition counter. The program then awaits the next ST pulse. (The array detector is running prior to executing the acquisition program.) The first ST pulse encountered acts as a post-trigger and initiates the ADC. Values from the ADC are sent into a circular buffer where they are overwritten until the first EOS pulse occurs; this determines when ADC conversions will begin being saved. Each TRIG pulse thereafter causes both signals (array detector and reference detector) to be sampled and saved, based on the channel clock pulse (counter 0). Counter 0 on the PCI-MIO-16E-4, acting as the channel clock, is configured to generate two pulses for each TRIG pulse. The program continues to sample both channels at every TRIG pulse until the acquisition is complete.
C. Software
The data acquisition program was written using National Instrument’s graphical programming language LabView (version 5.0). LabView was interfaced with the PCI-MIO-16E-4 using NI-DAQ 6.5.1, National Instrument’s driver software. The data acquisition program was derived from the LabView example called “Acquire N Scans ExtScanClk D-Trig.vi” in the anlogin.llb library.
Data acquisition uses a string of nine subroutines: AI CONFIG, Clock CONFIG, Clock CONFIG, ctr setup, Counter Start, AI START, AI READ, AI CLEAR, and Counter Stop. Each of these subroutines, excluding ctr setup, are standard LabView library functions.
“ctr setup” contains a copy of the LabView library subroutine called “Down Counter Or Divider Config” that has been modified to allow the parameters called “timebase edges in phase 1” and “timebase edges in phase 2” to be independently chosen.
References
1M. J. Ullom, Development of an Optical Spray Patternator Capable of Fast, Online Quality Control of Spray Nozzles and Spray Processes, M.S.M.E. Thesis, Purdue University, 2000.
2Hamamatsu Photonics K.K., Photodiodes, Cat. No. KP0001E06, December 1997.
3Hamamatsu Photonics K.K., MOS Linear Image Sensors, Cat. No. KMPD0001E03, July 1998.
4Hamamatsu Photonics K.K., N-MOS Linear Image Sensors Application Note, Cat. No. KMPD9001E02, September 1997.
5National Instruments, Application Note 045, “Is Your Data Inaccurate Because of Instrumentation Amplifier Settling Time?” August 1993.
6National Instruments, PCI E Series User Manual, July 1997.
7National Instruments, LabView Data Acquisition Basics, January 1998.
FIG. A1. Reference detector amplifier circuit and AD549 connections.
FIG. A2. Equivalent Circuit of Readout Section for a Pixel.3
FIG. A3. Timing diagram for MOS linear image sensors.4
FIG. A4. Data acquisition block diagram.
FIG. A5. Externally controlled data acquisition timing.
FIG. A1. Reference detector amplifier circuit and AD549 connections.
FIG. A2. Equivalent Circuit of Readout Section for a Pixel.3
FIG. A3. Timing diagram for MOS linear image sensors.4
FIG. A4. Data acquisition block diagram.
FIG. A5. Externally controlled data acquisition timing.