Homework #9: A/D Conversion
Question #1: A to D converter
The following circuit converts an analog input from 0 to 10V to a digital output read from the counter. Upon receiving a reset, the counter is cleared and the capacitor is discharged to 0. b=¥, VEB(on) = 0.7V, clock has 10,000 pulses per second. Find C.
Question #2: Sample and Hold: OpAmp bias current = 0.1mA
a. Determine the worst case Acquisition Time (AT) for a 0.5% error, where Vs can be any value from 0 to 1 volt. Neglect the bias current of the Op Amp.
b. What is the hold error is S is open for 10ms and the sampled voltage was 100mV. Neglect the AT error.
The picture is on the next page.
Question #3: The sample and hold current circuit shown is to use two Op Amps with Ibias = 1mA and a FET with a Cgs = 10pF. Vs is an AC signal with peaks of +/- 2V. When Vg = -10V, Q1=0ff. When Vg = +10V, Q1 = On. Ron = 50W
a. What is the minimum sampling time for a 0.7% error due to sample time (assume exponential charge rate for C).
b. What is the holding time error for a 750ms holding time.
c. Calculate the effect of Cgs.
Question #4: Op-Amp boot strap Ramp Generator ADC: Find DVo/Dt when the switch is open.
a. Plot Vo versus t
b. Find DVc3 for a DVo = 10V.
c. What clock frequency is needed to synchronize the clock to the tramp to give a 1 count per volt making this circuit an A to D converter. Assume that DVc3 is negligible for this part.
Drawing for Question #4:
More questions on the next page!
Question #5: A to D converter. The following circuit converts an analog input from 0 to 10 V to a digital output read from the counter. Upon receiving a reset, the counter is cleared and the capacitor C is discharged to 0V. IDSS = 4mA, Vp =10V, VS(JFET to ground) = 15V, clock = 10,000 pulses per second. Find R and C.
Question #6: One bit high speed flash A/D. CH1=CH2=100pF, ron(Q1)=ron(Q2)=10W, ro(A1)=ro(A2)=0, VOH1 = VOH2=VOH3 = 5V
VOL1 = VOL2=VOL3 = 0.0V. A1 and A2 are comparators.
Questions on the next page.
a. What is the min acquisition time to charge CH1 to .999 of VO when CK is high --- making Q1 = Q2 = ON
b. What is VO3 if vi = 0V? if vi = 0.5V? if vi = 1V?
c. If IIL of the exclusive or gate is -100mA and is constant from 0<Vi<ViL, what is the maximum hold time for CH1 if ViL is 0.8V before a logic low is no longer valid.
d. Add to the circuit to make it a 2 bit flash A/D converter.
Question #7: Binary to Analog Converter: The DAC shown has RF = 10kW. Determine the resistor values of Ro, R1, R2, R3. to give a Vo = -5V when Vi = 2 volts and all inputs are at a logic "1" and are equal to Vi.
You may also wish to attempt Questions 62, 66, 67 and 68 of chapter 10 in Sedra.