North Seattle Community College
NANO 230
Lecture outlines
Lecture 1 Sensors and actuators
S2 / MEMS – Mircoelectromechanical systems. Originally meant Si mechanical devices but now means sub-minature device with at least one dimension in the micron range including: chemical and biological sensors and actuators devices of all materialsCOTS-MEMS – commercial off-the-shelf
S3 / MST – Microsystems technology –european, “A microsystem is an intelligent miniaturized system comprising sensing, processing and/or actuating functions… integrated onto a single mulit-chip hybrid.”
S4 / Micro total analytical system (μ-TAS) – microsystem technology with an analytical function. Nanogen’s NanoChip $ 15K – 15M, exceptions of Spreeta and i-STAT $200 – 500, $30 disposable for Spreeta SPR bio film provides specificity byTI
S5 / Mechatronics – “Micromachines are composed of functional elements only a few mm in size and are capable of performing complex microscopic tasks.” CD players, autofocus
S6 / Sensor – converts one form of energy to another and provides the user with a useable energy output in response to a measurable input.
Motion sensors for physical rehab or ergonomics and pressure sensors shown
Aka transducer or detector
Students list some examples, pressure, acceleration, temp, gyro, chemical
S7 / Sensor die – chip with basic package with or without electronic circuitry
Integrated sensor – includes electronics to condition the output signal
Smart sensor – has integrated packaging, more complex electronics to do things such as auto calibrate, self test or temp compensation
S8 / Actuator – converts one form of energy to another and creates a desired action or effect. Similar to a sensor – if measuring it’s a sensor if doing its an actuator – the use not physics determines what it is.
Play Zygo video in MEMS folder
S9 / Energy forms
Mechanical, electrical, magnetic, thermal, radiant (photonic), chemical
Draw matrix on board (table 10.1 in text)
S10 / Examples electrical in mech out,
Electrostatic attraction –always attractive draw +/- sign
Draw two plates attracted – the comb drive makes the attractive force linear with voltage
Capacitance changes linearly. The comb drive can be hooked to a ratchet gear etc.
How can this be used as a sensor? Mech in gives electrical out.
Comb drive, microvision mirror
S11 / Example electro-magnetic in mechanical out
Scanning mirrors
Explain torque generated by F=iLXB,
Show Nippon video in MEMS folder.
S12 / Example mechanical in electrical out
Accelerometer with PZT (lead zirconate titanate) material on flexures.
Doped silicon is piezoresistive – MVIS mirror sensors within an actuator on flexures
S13 / Thermal in – electrical out – Seebeck effect – thermocouple – used to power a watch because skin side is warmer
Electrical in – thermal out Peltier effect – thermo electric heater/cooler.
Week1 Lecture 2 Handout: Homework 1.
Bulk MEMS
S12 / Example mechanical in electrical outAccelerometer with PZT (lead zirconate titanate) material on flexures.
Doped silicon is piezoresistive – MVIS mirror sensors within an actuator on flexures
S13 / Thermal in – electrical out – Seebeck effect – thermocouple – used to power a watch because skin side is warmer
Electrical in – thermal out Peltier effect – thermo electric heater/cooler.
S14 / Review directions and planes – (100), (110), (111)
S15 / Calculate KOH angle width – Derive z, tan 54.7 = z/w, w=z/tan54.7
Calc to show tan 54.7~root2 Wm = 2w + wo = wo + root2 z or wo= wm – root2 z
S16 / Etch stop – positive biased Si will not etch. For alkaline KOH etching.
S17 / Review there are electrons and holes that can carry charge in Si. When etching in acids (HF) holes are required to allow etching. These holes can be supplied electrically or through illumination.
S18 / Porous Si – made with HF etch solution. Chemically the same as bulk Si but more reactive because of high surface area
S19 / Shows porous Si etch cell
S20 / Carrier type, electrical bias and illumination all affect etching
Mechanisms are different for macro and micro pore size generation
S21 / Macro pore size – holes are generated at etch tip by light or E-field this causes etching in a straight vertical well. Can be coated with catalyst.
S22 / Application membrane reactor – porous silicon coated with palladium catalyst to convert CO to CO2
S23 / Process sequence for Pressure sensor (very simple device)
1) Clean and oxidize n-type Si, 525 um thick
2) Photo Mask1 PZR openings
3) Etch oxide in BOE, strip PR
4) Spin on Boron dopant and diffuse in
5) Etch all borosilicate glass and oxide from the wafer in BOE.
6) Grow 500 A oxide on wafers.
7) Grow 1200 A nitride on wafers.
8) Photo Backside alignment Mask2 diaphragm
9) Etch nitride film in RIE stop on oxide.
10) Etch oxide in BOE to bare Si, strip PR
11) KOH Silicon to make 50 um thick diaphragm
12) Photo front, Mask3 PZR contact openings
13) Etch nitride in RIE stop on silicon
14) Etch oxide in BOE to bare Si, strip PR
15) Evaporate Al on frontside, 1um.
16) Photo, Mask4 Metal traces
17) Etch Al in Phosphoric / Nitric acid mixture, strip PR
18) Anneal in N2 450C for 30 min.
Week 2 Lecture 1 Handout: Small Times monolithic MEMS
Bulk machining (continued – surface)
S23 / Pressure sensor reviewS24 / DRIE process – He backside cooling essential
S25 / DRIE and cut arbitrary shaped features in the front side pressure sensor diaphragm
Problem of break through – 2 solutions bond to backing wafer and put metal on back
Can go back to scanning mirror
S26 / Electrochemical sensor. fits in a 750um dia catheter, 250um thick wafer
KOH oxide selectivity 100 – 150 :1
KOH etch, oxidize how much needed? 30umX30um window
Oxidize more – does not grow in window area, metal and etch oxide
Also talks about using this structure to release drugs applying voltage causes metal electrode to dissolve
S27 / Packaging for electrochemical sensor- High impedance makes close IC a must
Screen printed hydrogel – polyvinyl alcohol (PVA)
Dip coated polycarbonate solution
Solder bump bonded to IC chip “Si integrated sensor” level
S28 / Pictures of finished device.
END switch to Madou ppt
S1 / Surface in Si layers of poly and oxide or psg – poly layers typically not more than 3 um
But there are many variations and exceptions.
S2 / Basic surface ground plane and first dielectric
S3 / Phosphosilicate glass – doped oxide, etches out more easily than ox – can also be used to dope subsequent poly.
S4 / Release step – Undercut etch rate must be greater than rate of attack of passivation or structural material.
S5 / Poly silicon tube for surface MEMS
S6 / Stiction and release of surface structures
Week 2, Lecture 2 – surface MEMS Handouts: Homework 3 due 4/20
MEMSCAP MUMPS levels and layers
S7 / Micro shell making a sealed cavity – end of day Madou ppt continuedS8 / MEMS wobble motor
Multi User MEMS Process (MUMPs) can buy a few die on a mask run.
Switch to “PolyMUMPS.flow.show.ppt” to cover material.
Dimples – small shallow features on the bottom of the lower polysilicon layer used to minimize stiction.
15 slides with animation.
Goes through 7 Layers (materials) and 8 LEVELS (MASKS) of the poly MUMPS process.
Shows cross section of the wobble motor
S9 / Sandia Summit - even more complex has 5 layers of poly
Difficult to keep structure planar with so may layers – uses chemical mechanical polishing (CMP)
Look at some pictures and videos at http://mems.sandia.gov/tech-info/summit-v.html (movie or image gallery)
S10 / MEMS vs CMOS challenge of making both on a single wafer.
Discuss challenges of MEMS first vs CMOS first. One problem for MEMS first, MEMS is non planar makes CMOS process a challenge.
S11 / Sandias answer – put MEMS in a pit passivate and planarize do CMOS process and release MEMS at the end.
S12 / Hinge structure made from poly
S13 / Pictures of MEMS pop up optical bench
S14 / HEXSIL – cover briefly
S16 / HEXSIL2 – cover briefly
S17 / Three kinds of SOI
Define buried oxide layer as BOX
Simox – implanted oxygen forms oxide layer. Limited to very thin top silicon but epi can be grown on top.
Bonded and etched back (BESOI) – used silicon fusion bonding oxide coated wafers are pulled together by surface forces – heating the wafers to 1100 C fuses the surfaces together –labor intensive.
One advantage of bonding – can pattern oxide on one wafer thus making cavities – pre machined in the SOI wafer. This is another MEMS fabrication trick.
One wafer must then be ground or etched back
Week 3, Lecture 1/2 – MEMS packaging HW#2 presentation due Wed
Ask Sergei about getting Si nanowire process. Exam and HW#3 due Fr i
S17 / Three kinds of SOIDefine buried oxide layer as BOX
Simox – implanted oxygen forms oxide layer. Limited to very thin top silicon but epi can be grown on top.
Bonded and etched back (BESOI) – used silicon fusion bonding oxide coated wafers are pulled together by surface forces – heating the wafers to 1100 C fuses the surfaces together –labor intensive.
One advantage of bonding – can pattern oxide on one wafer thus making cavities – pre machined in the SOI wafer. This is another MEMS fabrication trick.
One wafer must then be ground or etched back
S29 / Back to Nano230_MEMS PPT
Texas Instruments DMD another approach to surface – uses metal
S30 / Freeing mirrors after dicing protects them but more expensive
Dicing or separating the die is many times a problems for MEMS – discuss dicing – sawing also the newer laser dicing
After removing sacrificial layer and anti stiction layer is applied
S31 / IC packaging - Functions of IC package – signal redistribution, mechanical support, power distribution, thermal management – discuss what these mean.
In traditional packaging electrical connections are made by wire bonding from the edge of the die – draw a picture of a ball and wedge bond.
S32 / IC packaging – flip chip – the IC chip is covered with bumps and turned upside down for direct mounting to the PCB or other – usually a non conducting adhesive, called underfill, is applied to help hold the parts together.
In ACF the adhesive is already present in the form of a tape, although bumping the die may still be required it is more compatible with high speed pick and place manufacturing.
S33 / Packaging Levels 0-5 MEMS differs from ICs because dicing as we discussed is problematic and technologies like wafer bonding may be needed at Level 1 for a pressure sensor etc. One goal is to move Level 1 to wafer level to avoid costly die level assembly. Summary L0 = within device, L1=die, L2=can –ended lecture 1 here
S34 / Physical sensors and actuators are typically sensitive to other energy inputs than the primary intended one – the package plays a major role in this sensitivity – example thermal stresses will directly couple into the output of a pressure sensor or accelerometer.
Hybrid approach is better for chemical sensors so that electronics can be away from the exposure needed at the sense element.
Fabry-Perot interferometer (FPI) device. FPI is an electrically controlled optical bandpass filter that is widely used in spectroscopy. – shows additional concerns for MEMS packaging.
S35 / Wafer bonding moves MEMS die to level1 status.
Monolithic vs hybrid MEMS – for hybrid wafer level bond helps cut costs – electronics pic
Pressure sensor – bond needed for reference pressure
Chemical sensor – blood sensor example – transfer “can” function to wafer bond
Microvision mirror – vacuum seal from bonding removes need for vacuum can – very expensive cost $100s for can
S36 / Fusion bonding – pictures show a bonding wave (p487) propagating between two wafers.
Bonding takes place between surface OH groups, surface treatment in H2SO4-H2O2 etc, bonds fuse >800C
Steps, acid treat, plasma treat, DI rinse, join (shown), bond
In joining the wafers pull together spontaneously after initial contactCorrect plasma treatment may lower bond temp to 300C (ref)
Wafer Bonding Enables New Technologies and Applications
Laura Peters, Senior Editor -- Semiconductor International, 11/1/2003
S37 / Fusion Bonding – pristine surface requirement limits application – can’t cover electrical traces etc.Week 3, Lecture 1/2 – MEMS packaging
S38 / Anodic bonding – Negative charge at glass Si interface creates strong electrostatic attraction and promotes surface bonding at elevated temperature.
Easy to do on hot plate – can see bond spread through glass
S39 / Anodic - Several glasses can be bonded but only Pyrex has a TCE that will give reasonable stress state.
Advantages – strong and low temp, tolerates moderate (1um) surface roughness
Disadvantages – TCE mismatch causes stress, different processes need to developed for glass, no good anisotropic etch
S40 / Glass frit – difficult but possible to find TCE match to Si and <450C bond temp
Glass softens and flows under temperature and high pressure (force applied to wafers)
S41 / Glass frit -
S42 / Glass intermediate bonding layers can also be sputtered or spun on.
Sputtering can be difficult., spinning will not be smooth over wafers with rough topology
S43 / Organics – many options
Picture yellow bands are screen printed epoxy
S44 / Organics advantages and disadvantages
Contamination severity depends on application
S45 / Split field microscope is similar to mask aligner – but since wafers are not transparent a technique such as image capture is needed – positions first wafer and takes pic aligns 2nd wafer to video captured picture.
Many but not all bonders have separate alignment and bond fixtures
Mechanical disadvantage – must typically modify process to make tooling alignments
KOH – draw groove with fibers – fig 8.32, KOH mesa and pit as alignment keys
Week 3 lecture 2, cover packaging and types of wafer bonding.