Lamachan2 User Manual
Issue – 2.0
Kit Contents
You should receive the following items with your Lamachan2 development kit:
1 - Lamachan2 Board
2 - Programming Cable
Foreword
PLEASE READ THIS ENTIRE MANUAL BEFORE PLUGGING IN OR POWERING UP YOUR LAMACHAN2 BOARD.
PLEASE TAKE SPECIAL NOTE OF THE WARNINGS WITHIN THIS MANUAL.
Trademarks
Spartan-6, ISE, Webpack, EDK, COREGEN, Xilinx are the registered trademarks of Xilinx Inc., San Jose, California, US.
Lamachan2 is a trademark of Enterpoint Ltd.
Contents
Kit Contents / 2Foreword / 2
Trademarks / 2
Lamachan2 Board / 4
Introduction / 5
Lamachan2 Features / 6
FPGA / 7
Battery / 7
DIL Headers / 8
Expansion Connector / 10
SPI Flash Memory / 12
LEDS / 13
Push Buttons / 14
Oscillators / 15
PCIE INTERFACE / 16
USB / 17
POWER CONNECTIONS / 18
Heat Sinks / 18
POWER REGULATORS / 19
PROGRAMMING LAMACHAN2 / 20
MECHANICAL / 23
Medical and Safety Critical Use / 24
Warranty / 24
Support / 24
LAMACHAN2
Introduction
Welcome to your Lamachan2 board. Lamachan2 is a Spartan-6 based FPGA development board offering a highly powerful approach to prototyping FPGA and System designs .
Features include a Xilinx XC6SLX45T FPGA together 4 sets of DIL headers for addition of user circuitry and add-on modules.
Lamachan2 is supported by a wide range of add-on modules. Some examples of these
include:
ADC 7927 MODULE
LED DOT MATRIX MODULE
BUTTONS/SWITCHES/SATA/MEMORY MODULE
RS232 AND RS485 HEADER MODULES
DP83816 ETHERNET MODULE
SD CARD MODULE
DDR2 MODULE
IDE/5V TOLERANT CPLD MODULE
USB MODULE
D/A CONVERTER MODULE
ADV7202 MODULE
SDRAM MODULE
NAND FLASH MODULE
USB3 MODULE
We can also offer custom DIL Header modules should you require a function not
covered by our current range of modules. Typical turn around for this service is 6-8
weeks depending upon quantity ordered and availability of components.
The aim of this manual is to assist in using the main features of Lamachan2.
There are features that are beyond the scope of the manual. Should you need to use these features then please email for detailed instructions.
Lamachan2 is currently fitted with XC6SLX45-2FGG484C Spartan-6 devices. Other variants may be offered at a later date or as an OEM product. Please contact us on should you need further information.
Lamachan2 Features
Your Lamachan2 will be supplied un-programmed. Unless you have bought an OEM product your board will be supplied with either a Prog2 parallel port programming cable or a Prog3 USB port programming cable.
The Spartan-6 FPGA on the standard Lamachan2 board is supported by the free Webpack version of ISE. You will need version 11.1 SP4, or later, of the ISE tools, which are available from Xilinx at www.xilinx.com.
FPGA
Lamachan2 supports Spartan6 devices in the FGG484 package. Lamachan2 is normally available with either the XC6SLX45T-4FGG484C fitted, which has 43,661 logic cells or the larger XC6SLX150T-4FGG484C. Should you have an application that needs bigger devices, industrial or faster speed grades please contact sales for a quote at
BATTERY BACKUP
The Lamachan2 has a battery holder which is available to provide battery backup to the FPGA. It is connected to the Spartan6 on pin T16. The battery holder accepts a 3V Lithium battery size CR1220 or equivalent. The battery holder is only fitted if a larger FPGA than the LX45 is fitted.
DIL HEADERS
Lamachan2 has 4 sets of DIL Headers. Each set comprises two 2x34 socket strips on a 0.1inch (2.54mm) pitch. These headers can be used for add-on modules or user circuitry, subject to the power supply capacity of the Lamachan2 voltage regulators.
The outer rows of each pair of socket strips are connected to GPIO on the Spartan6 device (except for the first 4 pins on header 8). The inner rows are power connections, with a complete column of 34 GND connections on the left and a complete column of 3.3v on the right. The mechanical arrangement of the connectors is shown elsewhere in this manual.
The connections between the IO headers and the FPGA are shown in the table below.
HEADER COLUMNROW / 1 / 2 / 3 / 4 / 5 / 6 / 7 / 8
1 / L17 / L15 / AA18 / Y17 / B21 / D21 / V21 / NC
2 / K17 / K16 / AB18 / AB17 / B22 / D22 / V22 / NC
3 / G20 / M21 / V17 / Y15 / J20 / M17 / L20 / NC
4 / G22 / M22 / W18 / AB15 / J22 / M18 / L22 / NC
5 / G19 / K19 / AA16 / AA14 / M16 / N20 / P20 / T15
6 / F20 / K18 / AB16 / AB14 / N15 / N22 / N19 / U15
7 / F18 / J16 / U16 / Y13 / N16 / P17 / P21 / R11
8 / F19 / J17 / V15 / AB13 / P16 / P18 / P22 / T11
9 / E20 / H18 / U14 / W12 / R20 / R17 / R15 / T21
10 / E22 / H19 / U13 / Y12 / R22 / T17 / R16 / T22
11 / C20 / F21 / AA12 / Y11 / U19 / T19 / U20 / V19
12 / C22 / F22 / AB12 / AB11 / T20 / T18 / U22 / V20
13 / B18 / D18 / T12 / Y9 / H16 / AA2 / P19 / Y2
14 / A18 / D19 / U12 / AB9 / H17 / AA1 / R19 / Y1
15 / D17 / C19 / AA10 / AA8 / W4 / W3 / V2 / V5
16 / C18 / A19 / AB10 / AB8 / Y3 / W1 / V1 / V3
17 / G16 / B20 / W9 / T7 / U3 / U4 / T3 / T2
18 / F17 / A20 / Y8 / U6 / U1 / T4 / R4 / T1
19 / E16 / C17 / Y7 / Y5 / R3 / T6 / P6 / R7
20 / F16 / A17 / AB7 / AB5 / R1 / T5 / P7 / P8
21 / H14 / F14 / AA6 / AA4 / P2 / P5 / N3 / P3
22 / G15 / F15 / AB6 / AB4 / P1 / P4 / N1 / N4
23 / H13 / H10 / W17 / Y16 / N6 / M6 / M7 / M2
24 / G13 / H11 / Y18 / W15 / N7 / L6 / M8 / M1
25 / H12 / F7 / W14 / V13 / M5 / M3 / L3 / K4
26 / G11 / F8 / Y14 / W13 / M4 / L4 / L1 / K3
27 / G9 / D4 / T10 / V11 / K6 / K2 / J3 / K7
28 / F10 / D5 / U10 / W11 / K5 / K1 / J1 / K8
29 / G8 / C4 / W10 / U9 / H2 / J4 / J6 / J7
30 / F9 / A4 / Y10 / V9 / H1 / H3 / H5 / H8
31 / E5 / B3 / R9 / T8 / G3 / H4 / H6 / F5
32 / E6 / A3 / R8 / U8 / G1 / G4 / G7 / G6
33 / C5 / B2 / V7 / W6 / F2 / F3 / E3 / D2
34 / A5 / A2 / W8 / Y6 / F1 / E4 / E1 / D1
All the IOs on Lamachan2 have a 3.3V bank voltage. All the Header IOs are arranged as P and N pairs, for example Header 1 pins 1 and 2 are connected to FPGA pins IO_36P and IO_36N respectively.
Expansion connector
Lamachan2 has an expansion connector (Samtec type QRF8-026-01-L-RA-GP) which is connected to the FPGA via 3 of its High Speed MGT interface channels to allow stacking of Lamachan2 boards and expansion to other compatible boards. The connections between the connector and the FPGA are shown below.
CONNECTOR PIN / SIGNAL / FPGAPIN / CONNECTOR PIN / SIGNAL / FPGA
PIN
1 / EXP_RX0_P / D9 / 2 / EXP_TX0_P / B8
3 / EXP_RX0_N / C9 / 4 / EXP_TX0_N / A8
5 / EXP_RX1_P / D13 / 6 / EXP_TX1_P / B14
7 / EXP_RX1_N / C13 / 8 / EXP_TX1_N / A14
9 / EXP_CLK2_P / E12 / 10 / EXP_CLK1_P / A12
11 / EXP_CLK2_N / F12 / 12 / EXP_CLK1_N / B12
13 / EXP_RX2_P / D15 / 14 / EXP_TX2_P / B16
15 / EXP_RX2_N / C15 / 16 / EXP_TX2_N / A16
All other pins are not connected.
SPI FLASH MEMORY
The W25Q128BV SPI flash memory device on Lamachan1 SPI1 configures the FPGA when it is powered providing a suitable bitstream is programmed into the device. The W25Q128BV has a capacity of 128Mbits with a single configuration bitstream for the XC6SLX45T taking 1.45Mbits . Any remaining space can be used for alternative configurations or code and data storage. The W25Q128BV is a quad flash device, and with suitably chosen configuration options will allow the Merrick board to achieve the 100ms minimum PCIE configuration time.
After configuration the SPI Flash can be accessed via the following pins of the FPGA:
SIGNAL / FPGA PIN / W25Q128BV PINCCLK / Y20 / 6
MISO0/D / AB20 / 5
MISO1/Q / AA20 / 2
MISO2/WP / R13 / 3
MISO3/HOLD / T14 / 7
CS / AA3 / 1
The flash memory can be programmed using direct SPI programming from the 7x2 programming connector.
LEDS
Lamachan2 has 5 LEDs. LED1 is green and when lit indicates the presence of the 3.3v supply.
LEDs 2 to 5 are red and are connected to IO on the Spartan6 device.
The relevant IO pin for an LED needs to be asserted high to ensure the specified LED turns on.
The table below shows the connections between the FPGAs and the LEDs.
LED / FPGA PINLED2 / W22
LED3 / W20
LED4 / Y22
LED5 / Y21
PUSH BUTTONS
Lamachan2 has 2 push button switches which connect to the FPGA as shown below. To use these switches it is necessary to set the IO pins connected to the switches to have a pull up resistor setting in the constraints file. Any switch pressed, or made, will then give a LOW signal at the FPGA otherwise a HIGH is seen. The two push button switches are connected to the following IO pins.
SWITCH / FPGA PINPB1 / AB19
PB2 / C1
OSCILLATORS
There are 2 oscillators on Lamachan2. The first is a 25MHz ASEM oscillator which is connected to pin C1 of the FPGA. The second is a 3.3V plug-in DIL oscillator in a 2x4 0.1inch pitch socket which is connected to pin M20 which is a Global Clock input to the FPGA. For users who require other oscillator frequencies there is a third oscillator site capable of accepting an ASEM oscillator. This oscillator site is also connected to pin M20 of the FPGA so both this and the DIL oscillator cannot be fitted simultaneously. If you require a special oscillator to be fitted to your Lamachan2 board please contact .
The Spartan6 has Digital Clock Multipliers (DCMs) to produce multiples, divisions and phases of clock signals. Please consult the Spartan6 datasheet available from the Xilinx website at http://www.xilinx.com if multiple clock signals are required.
PCIE INTERFACE
The Lamachan2 has a x1 PCIe Interface. The pin out of the Spartan6 FPGA has been chosen such that the PCI interface follows the pinout for the Xilinx Spartan6 hard core for PCIe which can be generated automatically by the Xilinx Core Generator.
The connections between the PCIe connector and the FPGA are shown below.
SIGNALNAME / PCIE CONNECTOR PIN / FPGA PIN
PCIE_CLK_P / A13 / A10
PCIE_CLK_N / A14 / B10
PCIE_TX_P / A16 / B6
PCIE_TX_N / A17 / A6
PCIE_RX_P / B14 / D7
PCIE_RX_N / B15 / C7
PCIE_PRESENT#1 / A1 / M19
PCIE_PRESENT#2 / B17 / M19
PCIE_PWRGD / A11 / AB19
USB INTERFACE
The USB interface on the Lamachan2 is achieved using an FT232R USB to serial UART interface. The datasheet and drivers for this device are available from http://www.ftdichip.com. When appropriate drivers are installed the Lamachan2 USB port should be detected as a serial port. Alternative data optimised drivers are also available from FTDI.
The FT232R is connected to the Spartan-6 and provided a simple UART, or other converter, is implemented then the data sent over the USB serial port can be used either as control and/or data information. This allows a host computer to act in a number of ways including system control and data storage functions. The connections between the USB device and the FPGA are shown below:
FT232R / FPGA PINCTS# / L19
DCD# / K20
DSR# / J19
RI# / K22
RTS# / H20
DTR# / H22
TXD / H21
RXD / M19
The FT232R connections CBUS0 to CBUS3 are routed via a 4 element DIP switch to the JTAG connector for future use in reconfiguring the FPGA via a USB interface, a scenario which is theoretically possible but not so far established. These connections, when the switch elements are activated would be as shown below:
FT232R / JTAG SIGNALCBUS0 / TDI
CBUS1 / TDO
CBUS2 / TCK
CBUS3 / TMS
POWER CONNECTIONS
Lamachan2 is powered principally from the 12V supply on the disk drive connector or via the 2.1mm power jack (positive tip). A limited 12V supply can be provided using the PCIE connector, but the current available is limited to 0.5A so this should be avoided unless you know that your design does not consume more current than this.
The Lamachan2 is protected by a 7A non-resettable fuse.
HEAT SINKS
Depending on the design implemented in the FPGAs on Lamachan2, it may be necessary to implement a thermal dissipation scheme. One option is to add a heatsink to the FPGA e.g. those produced by Wakefield Thermal Solutions inc. (www.wakefield.com). Alternatively it may be necessary to attach a fan to either the Lamachan2 board itself or to any enclosure used with Lamachan2
POWER REGULATORS
Lamachan2 has two voltage regulators supplying 3.3V and 1.2V.
WARNING – REGULATORS CAN BECOME HOT IN NORMAL OPERATION ALONG WITH THE BOARDS THERMAL RELIEF. PLEASE DO NOT TOUCH OR PLACE HIGHLY FLAMABLE MATERIALS NEAR THESE DEVICES WHILST THE LAMACHAN2 BOARD IS IN OPERATION.
A Micrel MIC26950 regulator supplies 3.3V with a maximum current available of 12A. This provides power for the IOs and the header pins. It also supplies 3.3V to any user circuitry plugged into the headers pins e.g. add-on modules
An IRU1150 linear regulator supplies 1.2V with a maximum current available of 4 amps. This supplies the core voltage for the Spartan6 FPGA.
Programming Lamachan2
The programming of the FPGA and SPI Flash on Lamachan2 is achieved using the JTAG connection. Principally it is anticipated that a JTAG connection will be used in conjunction with Xilinx ISE software although other alternatives do exist. It is theoretically possible, although not yet established, to program the FPGA via the USB interface. The settings of the JTAG over USB switch elements should only be changed if you are attempting to use this facility. More information can be found under the heading USB in this manual.
There is a single JTAG chain on Lamachan2. The JTAG chain allows the programming of the Spartan6 and the SPI Flash device.