ECE 3430 Exam #3 Solutions (Fall 2009)
Name: Matt Laubhan
Score: 146/134 (score is out of 134—so 12 points of extra credit is available)
You may use your pink book (or printout of the pink book), calculator, pencil, and scratch paper if you need it. Nothing else! For multiple-choice questions, circle the single correct answer to each question. For short answer questions, write your answer in the space provided on this exam paper.
1) Which of the following is an HC11 assembler directive? [2 points]
a. RTS
b. FCC
c. ABY
d. MUL
2) The assembly statement LDD $12 indicates what to the HC11 at run-time? [2 points]
a. Load the contents of memory location $0012 into accumulator A and the contents of memory location $0013 into accumulator B
b. Load the contents of memory location $0012 into accumulator B and the contents of memory location $0013 into accumulator A
c. Load the value $00 into accumulator A and $12 into accumulator B
d. Load the value $12 into accumulator A and $00 into accumulator B
3) A peripheral device providing input to a microcontroller that picks up on change in the environment is called a: [2 points]
a. Transducer
b. Actuator
c. Sensor
d. Signal conditioning circuit
4) A device that converts one form of energy to another is called a: [2 points]
a. Transducer
b. Actuator
c. Sensor
d. Port
5) How many bytes can be addressed by a byte-addressable microcontroller with only 12 address lines? [2 points]
a. 12 bytes
b. 4 Kbytes
c. 256 bytes
d. 64 Kbytes
6) RMB is an: [2 points]
a. HC11 assembly language directive used to reserve initialized data memory
b. HC11 assembly language directive used to reserve uninitialized data memory
c. HC11 CPU instruction used to reserve initialized data memory
d. HC11 CPU instruction used to reserve uninitialized data memory
7) If during the execution of an HC11 store instruction, the operand for the store instruction represents the least-significant 8-bits of the address to where the data is to be stored, which addressing mode are we using? [2 points]
Direct addressing.
8) Fill out the contents of the HC11 registers/accumulators for the given code segment. Your answers should reflect the content after each instruction has executed. If the contents are unknown, write a question mark (?) in the blank. Write each number in hex format! [8 points]
ORG $E000
MAIN: LDD #1234 A = $04 B = $D2 D = $04D2 X = ? Y = ?
LDX #$02 A = $04 B = $D2 D = $04D2 X = $0002 Y = ?
LDY #%1101 A = $04 B = $D2 D = $04D2 X = $0002 Y = $000D
IDIV A = $00 B = $00 D = $0000 X = $0269 Y = $000D
DONE: BRA DONE
9) Hand assemble (or encode) the following assembly code into machine code. Write each number in hex format! [10 points]
ORG $E000
MAIN: LDX #$1234 Opcode = $CE Operand(s) = $12 $34
LDAB %11010010 Opcode = $D6 Operand(s) = $D2
TBA Opcode = $17 Operand(s) = <none>
ADDB 5,X Opcode = $EB Operand(s) = $05
BNE MAIN Opcode = $26 Operand(s) = $F6
…
10) Decode (or reverse-assemble) the following machine code back to the original assembly code. Write each number in hex format! : [8 points]
Machine code: Assembly code:
M($E000) = $37 PSHB
M($E001) = $C6 LDAB #$12
M($E002) = $12 -
M($E003) = $D7 STAB $BC
M($E004) = $BC -
M($E005) = $33 PULB
11) In our version of the HC11, PA7 and PA3 are bi-directional pins. Write the HC11 assembly code required to configure PA7 as an input and PA3 as an output simultaneously and without affecting the state of the other bits in appropriate control register (do not use BSET and/or BCLR instructions). [4 points]
LDAA PACTL
ANDA #%01111111 (or ANDA #$7F)
ORAA #%00001000 (or ORAA #$08)
STAA PACTL
12) If the HC11 condition code register contains the value $CA just prior to executing the BHI instruction, would the branch be taken or skipped? [2 points]
a. Taken
b. Skipped
Because C + Z == 0 (N = 1, Z = 0, V = 1, C = 0)
13) How many writes and reads are performed to and from memory on the HC11 address/data bus for the given assembly instruction. How many additional processing cycles are required? [6 points]
LDX $12
Machine code: $DE $12
2 reads to fetch opcodes and operands + 2 reads to get the bytes stored in memory locations $0012:$0013.
Number of reads = 4. Number of writes = 0. Additional processing cycles = 0. Total cycles = 4 (matches pink book).
14) How many writes and reads are performed to and from memory on the HC11 address/data bus for the given assembly instruction. How many additional processing cycles are required? [6 points]
STD 2,X
Machine code: $ED $01
2 reads to fetch opcodes and operand + 1 cycle to add offset (2) to X + 2 writes to store upper and lower halves of D to wherever X+2 points in memory.
Number of reads = 2. Number of writes = 2. Number of processing cycles = 1. Total cycles = 5 (matches pink book).
15) Assume memory contains the following:
M($1231) = $01
M($1232) = $23
M($1233) = $45
M($1234) = $67
M($1235) = $89
M($1236) = $AB
M($1237) = $CD
Assume I loaded a 32-bit register of a hypothetical byte-addressable microcontroller (call it register Z) with the contents of memory location $1234 as follows:
LDZ $1234
If this were a big endian machine, show the hex representation of the data in register Z. [4 points]
Z = $6789ABCD
If this were a little endian machine, show the hex representation of the data in register Z. [4 points]
Z = $CDAB8967
16) Which of the following logical masks should be used to toggle a bit in a register without affecting the state of the other bits? [2 points]
a. INV
b. AND
c. OR
d. EOR
17) Where does the additional overhead of calling subroutines come from? [2 points]
From the execution of the JSR and RTS instructions (pushing the PC to and pulling the PC from the stack). Extra overhead may also come from do-no-damage (extra stack operations within the subroutine).
18) A reset vector: [2 points]
a. Are only found in microcontrollers—not microprocessors
b. Provides the actual instructions to initialize system hardware
c. Provides the address of where a the program counter should be initialized
d. Provides the address of where the stack pointer should be initialized
19) Subroutines can call other subroutines. What single factor limits how many subroutines deep a processor can execute? [2 points]
How much stack space is available. How much system RAM is available.
20) Good interrupt service routines (ISRs) should: [2 points]
a. Always ensure the stack is empty before returning
b. Spend as little time as necessary to silence the hardware that is interrupting the CPU
c. Always preserve the programming model using explicit push and pull instructions
d. Spend as much time as necessary to service all the hardware requests
21) What causes a “branch out of range” assembler error? [2 points]
Attempting to branch more than 127 bytes forward or 128 bytes backward in the program address space.
22) List all the HC11 condition code register flags interrogated by the BEQ branch instruction. Include none that are not interrogated by this instruction. [2 points]
Z
23) Which of the following is not one of the fundamental components of all microcomputers: [2 points]
a. Control unit
b. Datapath
c. I/O Ports
d. Memory
e. Input
f. Output
24) Which condition code register flags (bits) can be modified by the BLO instruction? [2 points]
None. Branch instructions never modify CCR flags.
25) The purpose of using a compare instruction prior to executing a branch instruction is: [2 points]
a. To force a change of contents to accumulators
b. To preserve the CCR prior to branch instruction execution
c. To ensure memory is properly aligned for the branch instruction
d. To test a condition and adjust the CCR flags accordingly
26) Show how one could quickly multiply the contents of accumulator A by 4 (without using the MUL instruction) on the HC11. [2 points]
LSLA
LSLA
27) Assume the following values were pushed to the HC11 stack in this order: $87, $65, $43, $21. If the HC11 PULX instruction is immediately executed, what value would you expect to find in X after it completes? [2 points]
$2143
28) Approximately how long would it take the HC11 (if the E-clock frequency were 2 MHz) to execute the following code segment (assuming nothing interrupts this loop execution)? [2 points]
Bytes: Cycles:
LDAA #200 2 2
LOOP: DECA 1 2
CMPA #0 2 2
BNE LOOP 2 3
2 + 200 * (2+ 2 + 3) = 1402 cycles
1402 cycles * 500 ns/cycle ~= 701 microseconds
29) Is the CMPA #0 line required in the above code for the loop to execute 200 times? [2 points]
No. Because we are comparing against 0 and the DECA instruction modifies the Z flag in the CCR.
30) When the RTS instruction is executed, how many bytes are pulled from the stack? [2 points]
a. 1
b. 2
c. 9
d. None, the programmer must remember to do this
31) Name one utility/debugging subroutine you used in the lab which used register/accumulator parameter passing? [2 points]
SNDBYTE or OUTA
32) Assume the stack pointer is initialized to $00F0. During execution of the main program, four bytes are pushed to the stack. While these four bytes are on the stack, a timer overflow interrupt occurs. What would the stack pointer register contain prior to executing the first instruction in the timer overflow interrupt service routine? [2 points]
$00E3
33) Assume timer overflow interrupts are enabled. If the PR1 and PR0 bits in the TMSK2 register are set to 1 and 0 respectively, how many times in 1 second would the timer overflow ISR execute? Assume the ISR executes instantaneously. Assume the E-clock frequency is 2 MHz. Remember, PR1 and PR0 define the factor by which the E-clock is divided down before entering the 16-bit free-running timer. [2 points]
Prescale factor = 8. Therefore, TCNT will increment 250,000 times in one second. Every 65,536 ticks equals one timer overflow (and one timer overflow interrupt). 250,000/65,535 ~= 3.8. So between 3 and 4 times.
34) To reset the computer operating properly (COP) watchdog timer: [2 points]
a. Software must sequentially write the values $55 and $AA to RAM
b. Hardware must interrupt the CPU
c. Software must sequentially write the values $55 and $AA to a control register
d. Software must generate a software interrupt using the SWI instruction
35) Assume one of the HC11’s input capture channels is configured to capture rising edges on a dedicated input pin (PA2). When a rising edge occurs, the value of TCNT (the 16-bit free-running counter) is captured into which of the following registers? [2 points]
a. TIC1
b. TIC2
c. TIC3
d. TI4O5
36) Reconsider question #35. If a square wave (ranging from 0V to +5V) were input to PA2 and the input capture channel was configured to generate an interrupt on a successful capture, which of the following describes what we would need to do to calculate the frequency of the input square wave? [2 points]
a. Calculate the difference between the current capture register’s contents and the previous capture register’s contents.
b. Calculate the difference between the current capture register’s contents and the previous capture register’s contents. Multiply by the time required to execute one E-clock cycle.
c. Calculate the difference between the current capture register’s contents and the previous capture register’s contents. Multiply by the time required to execute one E-clock cycle. Invert the result.
d. Calculate the difference between the current TCNT value and the previous capture register’s contents.
37) Which of the following has the highest default interrupt priority on our version of the HC11? [2 points]
a. Pulse accumulator overflow
b. Illegal opcode trap
c. Timer output compare channel 1
d. Timer overflow
38) What HC11 instruction can be used as a substitute for BSR? [2 points]
JSR can be used instead.
39) Reconsider question #38, why would you want to use that as a substitute? [2 points]
If the target subroutine for the branch is more than 127 forward or 128 backwards in the program address space, BSR will not be able to reach it because it uses relative addressing. JSR supports extended and indexed addressing modes and therefore has no such limitations.
40) The HC11 pulse accumulator can generate interrupts in response to which of the following events? [2 points]
a. Rising or falling edges of the PAI (PA7) input only
b. Rising or falling edges of the PAI (PA7) input and PACNT overflow
c. Input edges too close together
d. The pulse accumulator cannot generate interrupts
41) Assume the HC11’s output compare channel #4 is configured to generate a waveform on a dedicated output pin (PA4). Assume the channel is configured to generate an interrupt on a successful compare. Which two registers must be equal to cause an output compare channel #4 interrupt to fire? [2 points]
a. TIC4 and TOC4
b. TOC4 and TCNT
c. TCNT and TIC4
d. PACNT and TCNT
42) Reconsider question #41. If we wanted to generate a square wave with a 50% duty cycle (constant frequency) coming out of PA4 and using output compare, we would do which of the following in the output compare channel #4 ISR? [2 points]
a. Calculate Euler’s number to a thousand decimal places
b. Add a variable offset to the value of the TOC4 register and store back to TOC4
c. Add a constant offset to the value of the TOC4 register and store back to TOC4
d. Add a constant offset to the value of the TOC4 register and store back to TCNT
43) True or false: The output of an output compare channel must be a periodic waveform. [2 points]
a. True
b. False
44) What common A/D technique was discussed in lecture that actually used D/A conversion internally? [2 points]
Successive Approximation. This is a binary search technique that guesses each bit in the digital result from most to least significant and evaluates after each step if the initial guess was correct or not. An n-bit A/D converter would take n steps/iterations to complete the calculation.
45) 8-bit digital-to-analog conversion can be most accurately described as: [2 points]
a. The process of mapping a digital input value to one of 255 analog voltages
b. The process of mapping a digital input value to one of 256 analog voltages
c. The process of mapping a digital input value to one of 65535 analog voltages
d. The process of mapping a digital input value to one of 65536 analog voltages
46) Consider the serial D/A converter discussed in class (the RC, low-pass filter). Assume the input digital voltages range from 0V (logic 0) to +5V (logic 1). If we wanted to output a steady voltage of 1.5 V, what kind of a waveform would we present to the filter? [2 points]