9712 Grove Crest Ln. Apt 1513

ASHISH PANDAY

9712 Grove Crest Ln. Apt 1513

Charlotte, NC - 28262

E-mail: Phone: 704-557-6085

Summary

Competent inComputer Architecture.
Experienced in various Threading interfaces like MPI, OpenMP, Pthreads, Jthreads and their combinations.
Conversant with all phases of Performance Modeling includingComplexity evaluation, Regression Analysis andQueuing Theory.
Exposure to Statistical Modelinginvolving evaluationof Stochastic Processes.
Familiar with Intel VTune™ performance analyzer.
Proficiency in developing IBMCell Broadband Engine architecture based applications.
Acquainted with CUDA programming for GPU systems.
Familiar with various Data Structures and their properties.
Exposure to various Fault tolerant Modeling Techniques in Many-Core Architectures.
Knowledge of various Digital System Testing Techniques for Combinational and Sequential circuits.
Applied strong interpersonal and communication capabilities to workin a diverse environment.
Strong analytical, problem solving and diagnostic skills.

PUBLICATIONS

“Study of data locality for real-time biomedical signal processing of streaming data on Cell Broadband Engine” – SoutheastCon 2010
“Real-Time Processing of Biomedical Streaming Data on Cell Broadband Engine” – Journal of Real Time Image Processing (in progress)
Book Chapter – “Green Computing Platforms for Biomedical Systems” of Handbook On Green Communication and Systems (in progress)

MAJOR ACHIEVEMENTS

Master’s thesis - Real-time implementations of Pair-Wise Correlation on IBM Cell Broadband Engine for Biomedical applications like EEG signal Analysis Algorithms.
Worked as a Research Assistant under Dr. Bharat Joshi to build a Visual Analysis Toolusing Matlab and Simulink for Gridlab-D Engineering, an existing project at PNNL.
Design and Implementation of a Cache Simulator to support ‘Direct Mapped’, ‘Fully Associative’ and ‘Set Associative’ along with write-back/through policies.
Senior Design Project involving design and development of a new encryption algorithm for mobile communication which is potentially more secure than A5/x and ECC Algorithms.
3-months internship at Analogic Controls India Ltd., encompassing design and development of Ethernet - multiple serial port switch using RABBIT MICROPROCESSOR™.

Skills▪ Languages : C, C++, VHDL

Threading Interfaces: MPI, OpenMP, Pthreads, JThreads
Parallel Platforms: x86, IBM Cell Broadband Engine, GPU
Embedded Platforms: 8051 microcontroller, 8086 and other x86 based microprocessors, RABBIT™ microprocessor and RENESAS™ microcontroller
Tools : MATLAB, PSPICE, Xilinx, ModelSim
Operating Systems: Unix, Linux and Windows

EducationPhD in Electrical and Computer Engineering August 2010 – present

University of North Carolina at Charlotte, NC

Masters of Science inElectrical EngineeringAug 2008 – Aug 2010

University of North Carolina at Charlotte, NC GPA: 3.714/4.00

Bachelor of Engineering Aug 2004 – May 2008

Electronics and Communications Engineering GPA: 3.5(est.)/4.0

Manipal Institute of Technology, Karnataka India

Academic projects

Study of data locality for real-time biomedical signal processing of streaming data on IBM Cell Broadband Engine / Jan 2009 – May 2010

The project was developed using software tools and libraries of Cell/B.E. Software Development Kit.
Study the architecture of Cell/ B.E. and understand the Cell/ B.E. SDK.
Designed and developed a parallel implementation scheme for Pair-Wise Correlation that is well suited for Cell/ B.E which exploits temporal and spatial localities
Computation and Communication complexities were analyzed to classify the problem as compute-bound.
Computations were vectorized as much as possible and manual loop-unrolling and data prefetching was employed.
Double buffering was exercised to hide DMA transfer time.

Cache Simulator Aug 2008 – Dec 2008

Development of a Cache Simulator using object oriented conceptualities, implemented by C++.
The simulator supported different associativities in which cache can be classified i.e. ‘Direct Mapped’, ‘Fully Associative’ and Set Associative’.
Look-ahead buffers were also included.
The simulator adapteda write back/through policy,as chosen by the user.
Returns the data hit/miss, instruction hit/miss and Look Ahead hit/miss ratios.
Tested with suitable SPECint2006 benchmarks.

Secured GSM Jan 2008 – May 2008

Senior Design Project which involved designing a new encryption algorithm for mobile communication.
Had the potential of being more secure than A5/x and ECC algorithm.
The project was developed in C++.

Professional Experience

research assistant Dec 2009 – Apr 2010

VISUAL ANALYSIS TOOL FOR GRIDLAB-D

Designed and developed a MATLAB based visual interface to analyze and understand the trends in data generated by Gridlab-D, a new power distribution system simulation and analysis tool.
Simulink 3D animation toolkit of MATLAB was used to buildthe interface.

Build virtual reality worlds using VRML authoring tools.
Imported VRML worlds, including CAD models.
Viewed virtual reality worlds using VRML viewers.
Linked and interacted with virtual worlds using MATLAB functions and Simulink blocks.

Worked in a collaborative, virtual environment.
The user had the flexibility of instantiating various modules of the powerflow network.

teaching assistant Aug 2010 – Dec 2011

Intern at Analogic Controls india ltd.May 2007 – July 2007

ETHERNET – MULTIPLE SERIAL PORT SWITCH

Communicated data from/to Ethernet port and multiple serial ports.
The user had the flexibility of choosing the serial ports to communicate data with.
Other parameters configurable by the user were frequency, bandwidth and serial port id.
Enriched user interface in the form of a 4x16 LCD screen.