UNIVERSITY OF CALIFORNIA

College of Engineering

Department of Electrical Engineering and Computer Sciences

Last modified on April17, 2006.

Borivoje NikolićFALL 2006 TERM PROJECT PHASE IV (FINAL) EECS 141

  1. SRAM array assembly

In this phase you will assemble the complete array, consisting of the decoder and the SRAM array in both schematic and layout. You don’t need to include the sense amplifier in the final design. The final design needs to be LVS clean, fully extracted and simulated.

  1. SRAM array verification

Verify the functionality of the memory designed in previous three phases. Extract the memory layout and verify its functionality. Verify that the wordline capacitance matches your estimates.

3.Report

The total report should not contain more than five pages. You are not allowed to add any other sheets. The organization of the report should be based on the following outline:

Cover page: Names, project title, summary of the parameters that include the simulated memoryread delay and the overall area of the design.

Page 1:Annotated schematic and layout of memory cell. Explain your main design decisions and any deviations you made from the initial phase I design.

Page 2: Annotated schematic, layout and simulation of the memory decoder. Worst-case delay simulation of the decoder, including the extracted wire load (and hand-estimated wire capacitance). Explain your design choices and any changes you made from phase 2. Compare your pre-design estimates with extracted simulations.

Page 3: Simulation of read and write operations of the memory. Demonstrate that the array works. Assume that the sense amplifier is firing when the voltage difference between the bitlines is larger than 100mV.

Page 4: Annotated schematic (or block diagram) and layout of the complete array.

Grading:

20%Approach and correctness

20%Results

30%Report

30% Poster

Please submit your reports in the drop box, and bring the posters to BerkeleyWirelessResearchCenter on Tuesday, May 2. Also, please email your reports and posters to . Include compressed extracted netlist and the LVS report.