Instrumentation Development Labs
IDL_17_004 –X-Ray Timing Distribution Modules (XTD)Internal Documentation/ User Manual Guide
Documentation PreparedBy Julien. C
Email :
University of Hawaii at Manoa
Office # : WAT209
Office Phone # : (808) 956-2941
Updated : 7 / 3 / 2017
Table of Contexts- Introduction
- Functional Diagram
- Physical Description
3.2 Port
3.2.1 Front
3.2.2 Display
3.2.3 RJ-45
A .CLK/BM A/B
B. JTAG
3.2.4 Back
4 . Electrical Property
4.1 Absolute Maximum Rating
4.2 Recommended Operating Conditions
4.3 JTAG Electrical Characteristic
4.4 RF input/Output Electrical Characteristic
5 . Hardware Compatibly (revision required)
6. Software Description
6.1 Installation Guide on Raspberry PI 2
6.1.1 Installing OS/Package
6.1.2 Configuration
6.2 Running Raspberry Pi 2 Scripts
6.2.1 “defaultdriver.py” – Main Script
6.2.2 “si5338_post.py” – PLL drivers
6.3 Optional : Instruction on generating PLL’s Register Map Using
Clock Builder Desktop 6.4 (Requires Window) / 7 Testing Set Up
8. Calibration
9. List of Change Recommended For Future Revision.
10. Documentation Correction
Appendix
A. Schematic
B. Layout
C. Part List
D. Reference Code
D.1. defaultdriver.py
D.2. pin.py
D.3. Map.txt
E. NIM Crate Solidwork’s Model
E.1 Front Panel
E.2 Back Panel
Reference
1 .Introduction
X-Ray Timing Distribution are module designed to fan out the input’sClock/Revolution Marker signals and JTAG signal for application in SuperKEKBCyclotron’s X-Ray Monitor. It has a SMA RF input which is preset to accept 508.9MHz sinusoidal signal which are fed to the Phase Frequency detectors (PFD) which cleans the signal and correct the phase of the signal. The Bunch Marker are generated using the 2 x 8 bit counter on board to divide the RF input reference clock. The revolution marker are used rest the counters. These Bunch marker signals are program by programming a shift register at the start of the operation by Raspberry pi 2 (Single Board Computer ) Running on raspbian. There is an on-board diligent debugger which is the can be used as the remote JTAG communication using a RJ-45 connectors. It is in a Nuclear Instrumentation Module (NIM) format and the module has a option to be powered by from NIM crates or AC power provided by 3 prong power socket which is toggled by the switch in the back of the modules.
2 .Functional Diagram
3. Physical Description
Port
/ 3.1 Front Physical DescriptionInput
RF INPUT (SMA - 509MHz)
REV MARKER (LIMO)
Output
JTAG Programmer (RJ-45 x 2)
CLK/BM (RJ-45 x 2)
TEST SIGNAL (LEMO - 99kHz Pulse 2ns)
TEST RF SIGNAL (SMA - 509MHz)
3.2 Display / `
XTD : Current Input of PLL ; The RF or OBC
BMA: Bunchmarker # for the marker A*
BMB: Bunchmarker # for the marker B*
TEST CIRCUIT: Status of the on-board testing Circuits.
JTAG: Select A or Both (Note Currently Not working).
IP: Current IP address.
3.3 RJ-45( Front View )
*See section on compatibilities for more information regarding remote JTAG comparability / JTAG
Differential Pairs are listed Below.
Port A
1 : TDO1_P
2 : TDO1_N
3 : TDI1_P
4 : TMS1_N
5 : TMS1_P
6 : TDI1_N
7 : TCK1_P
8 : TCK1_N / Differential Pairs are listed Below.
Port B
1 : TDO2_P
2 : TDO2_N
3 : TDI2_P
4 : TMS2_N
5 : TMS2_P
6 : TDI2_N
7 : TCK2_P
8 : TCK2_N
CLK/BM A/B / RM /
Differential Pairs are listed Below.
Port A
1 : BMB1_P
2 : BMB1_N
3 : RMOUT1_P
4 : BMA1_N
5 : BMA1_P
6 : RMOUT1_N
7 : RFOUT1_P
8 : RFOUT1_N / Differential Pairs are listed Below.
Port B
1 : BMB2_P
2 : BMB2_N
3 : RMOUT2_P
4 : BMA2_N
5 : BMA2_P
6 : RMOUT2_N
7 : RFOUT2_P
8 : RFOUT2_N
/ 3.4 Back Physical Description
Raspberry Pi 2
USB 2.0 x 4
RJ-45 100 mbsp
Micro-USB Digilent Programmer SMT2.
Power Switch (NIM PWR / AC PWR)
NIM POWER BLOCK
A/C Connectors
4.1 Electrical Property
4.2 Absolute Maximum Rating
Parameter / Symbol / Test Condition / Value / UnitsAC Supply / VAC / ECS60US05 Datasheets Reference / 80~264 / Vac
RF INPUT Voltage / VRFINPUT / Max Vbr of HSMS-282x Datasheets Reference* / 15 / V
REV INPUT Voltage / VREVIN / Max Vbr of HSMS-282x Datasheets Reference* / 15 / V
Operational Temp / Top / Max Rated TOp for UHS-I Cards Datasheet / 85 / °C
*This is Input protection breakdown voltage.
4.3 Typical JTAG/ CLK /BM Output Electrical Characteristics
Parameter / Test Condition/ Source / Vcc / T = 22 °C / UnitMin / TYP / Max
VOH (LVDS)VOY / Unloaded Single-ended pin values / Measured W/ Multimeter / 3.3V / 3.27 / Vcc – 0.07 / V
VOL (LVDS) / Unloaded Single-ended pin values/ Measured W/ Multimeter / 3.3V / Vee + 0.2 / 0.2 / V
Io = Receiver Output Current / SN65LVDXX Datasheet’s Maximum Output / 3.3V / -12 / 12 / mA
VOC (LVDS) / SN65LVDXX Datasheet’s Average output / 3.3V / 1.2 / V
Tpdt (TDO) / SN65LVDS2 & SN74AUP1T157DCKR Datasheet / 3.3V / 4.2 / ns
Tpdt (TDI, TMS, TCK) / SN65LVDS1 & SN74LVC2G34DCKR
Datasheet / 3.3V / 2.5 / 7.2 / ns
Tpdt (CLK) / Si5338 Datasheet / 3.3V / 2.5 / 4 / ns
Tpdt (BM) / 3.3V / ns
Source : /
Source :
4.4 Typical RF Input/output Electrical Characteristics
Parameter / Test Condition/ Source / Vcc / T = 22 °C / UnitMin / TYP / Max
VppRFIN / Value used during testing / 500 - 700 / mV
fop / Si5338’s Differential Input range values / 5 / 508.9 / 710 / MHz
Rin / Design Parameter / 50 / Ω
5.1 Hardware Compatibly
This are listed are hardware compatibility device. This was determined by examine the schematic/layout to determine the pin compatibility for each functionality to the device. (Updated : 2017-06-06 : NOTE : there is a currently know issue with the LVDS portion of the line that make impossible to communication. For more information, please read the IDLAB XTD’s JTAG Debugging Note 2.) This can be programmed thru the external Diglient programmer or on-board
Remote Programming Application (JTAG operation) :
STRAP Board Rev A (Not been Tested) : No RJ-45 or functional JTAG:NO
SCROD Rev B2 – IDL_15_007 (Not Been tested) :With TJ Hooker Rev A : Cable - Straight Thru RJ-45 Style: YES
SCROD Rev B – IDL_14_002 (Not Been Tested) :No RJ-45, Only Physically Solder wire : NO
SCROD Rev A5 – IDfL_15_002 (Not Been Tested) : Requires a Custom Cable wiring scheme shown below*: PROBABLE
SCROD Rev A4 – IDL_15_002 (Not Been Tested) : Requires a Custom Cable wiring scheme shown below*: PROBABLE
SCROD Rev A3 – IDL_13_037 (Tested Confirmed to be able to program using IMPACT and openocd): Requires a CustomCable wiring scheme shown below*: PROBABLE
Custom Cable Scheme for Remote JTAG (Note : Only use this when SCROD version A )Pin # / 1 / 2 / 3 / 4 / 5 / 6 / 7 / 8
XTD Side / wO / O / wG / B / wB / G / wBr / Br
SCROD Side / Br / wBr / wB / G / wG / B / wO / O
*Even if with the custom cable, Current version has some issue using the onboard JTAG. This has been only tested with the first generation.
Clock distribution Application (CLK/BM Operation) :
SCROD Rev B2 – IDL_15_007 (Not Been tested) : With TJ Hooker Rev A : YES
SCROD Rev A3 - IDL_13_037 (Not Been tested) : RJ-45 Custom Cable
6.1 Software Description
Most of the software will be preinstalled on the XTD RPI. However, if there is memory correction on the MicroSD, here are the instruction on reinstalling them.
6.2 Installing OS/Package
Installation Guide on Raspberry PI 2
First you would need to install the raspbianos in a flash drive. Then we will need to install the necessary package from the terminal by accessing them thru SSH.
6.2.1 Installation Raspbian on MicroSD with Window 10
**There are plenty of installation procedures available online: Google is your friend, If something doesn’t work please use a common sense.
(Still needs work/ Screenshot)
6.2.2 Installation with on MicroSDwith Linux (Not been tested)
**There are plenty of installation procedures available online: Google is your friend, If something doesn’t work please use a common sense.
Source :
The instruction is the following, using a MicroSD card, First, we need to determine which the mounted directory. To do this, we will run the df below the example df
linux@ubuntu:~$ df
Filesystem 1K-blocks Used Available Use% Mounted on
/dev/loop0 25948028 13156440 11473496 54% /
udev 1018844 4 1018840 1% /dev
tmpfs 410444 872 409572 1% /run
none 5120 0 5120 0% /run/lock
/dev/sda6 42074200 35229872 6844328 84% /host
none 1026108 0 1026108 0% /run/shm
/dev/mmcblk0 1946896 4 1946892 1% /media/mysdcard
umount /media/mysdcard
to creating the disk partition on the MicroSD card.
sudomkdosfs -F 32 -v /dev/mmcblk0
sudoddbs=1M if="/home/linux/2013-02-09-wheezy-raspbian.img" of=/dev/mmcblk0
Now you have working OS image on the MicroSD card.
Installing the Necessary Package.
There are few packagein order to get the current patched version from github repository. First it is recommended to update all of the current package installed on the current Operating System (OS). To update the current application. Run this following commend.
sudo apt-get update & upgrade
After the update, then if not installed, install git on the current file.
sudo apt-get install git
Configuration
So the link you would need to clone the directry from the github account, So first go to your home directory.
cd ~
So now that you are on the home directory, we need to make a directory for the XTD.
mkdir XTD
Run this command line below to clone the remote directory on the github account to the local directory.
sudogit clone
Once the files been uploaded on to your local directory, then proceeds to the changing the directory on to the “XTD” directory using cd command and opening the sub directory called “maindriver”. Once that is done, you are now ready to run the directory form. Check if the
Running Raspberry Pi 2 Scripts
“defaultdriver.py” – Main Script
This is a general file to run the functionality of the XTD. The command to do this is following
Example 1 : Running the Main Script.
sudo python ./defaultdriver.py
“si5338_POST.py” – PLL drivers
This is the general drivers for the PLL. It is written in python. When init function will write to i2c registry automatically need to program. There is also function is program function that will be used by the defaultdriver to program all registry mapping fromthe clock builder 6.4 from silab. The function will look for the registry mapping generated by the clockbuilder 6.4* and the file must be named “map.txt” in the current working directory. If this does not exist, then this function will result in error. If you clone from the github. This file should be included. However, if you would like to change any of the output
To understand what is happening in the PLL here is the functional diagram below
*see optional section for instruction to running to clockbuilder 6.4
Example 1 : Implementation in XTD’s si5338_POST.py Python Scripts for Programming Device.)
from si5338POST_Test import *
fromuserSettings import *
from REGS import *
fromsmbus import SMBus
fromRPi.GPIO as GPIO
REGMAP = “map.txt”
Bus = SMBus(1)
user = userSetting()
user.osc = bool(int(osc))
pll = si5338POST(0x70, user.osc, bus,VCOREGS, PINS[“Interrupts”], GPIO)
pll.program(REGMAP)
Optional: Instruction on generating PLL’s Register Map Using C1lock Builder Desktop 6.4 (Requires Window)
The clockbuilder 6.4 can be downloaded from this link above.
Link:
You might need to register to download them, but alternatively inside the XTD REV B box there should be a CD with necessary software.
After installing, the you need start the program. Once the program starts, the Device and EVB pop up window opens
Once it opens up, the if you are using the XTD rev B, then you should select SI5338 and select “Do not connect the EVB” then click ok.
The “frequency plan” tab shows access to select the input frequency, the PFD output for each output. There is a two option that is available on the XTD; Onboard Clock and Rf input. The IN1, IN2 are connected to 127.15Mhz on-board clock for testing purposes, and the IN5, IN6 are the RF input coming from SMA connectors.
For the current setting the here is the current setting
INPUT CONFIGURATION = Differential ON IN1 & IN2 (5 – 710MHz)
INPUT FREQUENCY (MHZ) = 508.9MHz
OUTPUT FREUQNCIES (MHZ) = Add CLK0 : 127.15MHz, CLK1 : 127.15MHz, and CLK2 : 127.15MHz
For the Next tab shows Output Drivers for each clock fan out for the PLL.
Currently the register needs to be programmed in this configuration for the current operation.
CLK0A/B – ON – LVDS3.3V - CLK0 stopped low when output disable - No inversion
CLK1A/B – ON – LVDS3.3V - CLK1 stopped low when output disable - No inversion
CLK2A/B – ON – LVDS3.3V - CLK2 stopped low when output disable - No inversion
The Next tab of interest are the “status” tab which when connected using the EVB, it will display the current status of the chips and the configuration of the masking status. Currently, all the current status to be working order then must have none of the status be masked.
Note that under interrupt mask (Register 6 ) is all unchecked.
Testing Set Up
If you would like to know how all of the functionality were tested please read the application note for more information.
Link :
Calibration
If you would like know more regarding now to calibration the bench maker and the rev marker please read the application note for more information.
Link :
Warning, most of the system are already calibrated to accept the revolution markers so be ca
List of Change Recommended For Future Revision.
- Remove the testing circuit. It’s was unnecessary and mostly unused.
- Add additional output for JTAG/ CLK/TRIG.
- Replace the display with cheaper LCD modules. Current modules are bit pricy. Something like this and run a link :
- Diligent smt2 are currently not working properly, I would recommend adding buffer closer to the smt2 or bring the module closer.
- Raspberry Pi 2 worked well, but we can make them as raspberry pi zero will save on the total cost.
Appendix
- Schematic
See Altium Files Link :
B. PCB
See Altium Files Link :
C.IC Part List
Name / Datasheet Link1 / SN65LVDS1 /
2 / SN65LVDS2 /
3 / HSMS-2822 /
4 / ADCLK925BCPZ(Sine-LVPECL) /
5 / SI5338A-B-GM(PLL) /
6 / LT1945 /
7 / MAX9601EUP (NIM-LVPECL) /
8 / 85411AMILF(1:2 FANOUT LVPECL-LVDS) /
9 / 74HC590PW(8 bit Counter) /
10 / LT1395C55(OPAMP) /
11 / 74HC682DW(2x8 COM) /
12 / MC100LVEL29-D(DOUBLE DFF) /
13 / SY89845UMG (1-4 LVPECL-LVPECL) /
14 / 55855VKG (LVPECL-LVDS) /
15 / MC100EP016A(8_Bit_Counter) /
16 / SY58032UMG (1-8 Fanout) /
17 / SN74LV594APWR (Shift Regisiter) /
18 / CVCO55CL-0490-0540 (VCO) /
19 / SN74LVC2G34DCKR /
20
D. Reference Code
D.1 defaultdriver.pyfromuserSettingsimport*
importRPi.GPIOas GPIO
fromsmbusimportSMBus
from si5338POST import*
from REGS import*
from PINS import*
frombunchMarkerimport*
import time
import seps525
from text importText_stringas TS
importcsv
from font import Font
importspidev
fromgetIPimport*
importos
# Default Values
osc =0 # 0 = RFin; 1 = osc
testSignal=1 # 0 = off; 1 = on
jtag =1 # 1 = SCROD A; 0 = SCROD A+B
bma =501
bmb =499
REGMAP ="map.txt"
GPIO.cleanup()
GPIO.setmode(GPIO.BCM)
GPIO.setup(PINS["TESTEN"], GPIO.OUT)
GPIO.setup(PINS["JTAGSEL"], GPIO.OUT)
GPIO.setup(PINS["SHUTDOWN"], GPIO.IN)
GPIO.output(PINS["TESTEN"],True)
bus =SMBus(1)
#user interactive components are commented out for default driver
user =userSettings()
user.osc=bool(int(osc))
printbcolors.WARNING+"Loading PLL"+bcolors.ENDC
pll= si5338POST(0x70,user.osc, bus, VCOREGS, PINS["INTERRUPT"], GPIO)
pll.program(REGMAP)
# Debugging Purposes : programs from clockbuilderreg map
#pll.regcheck(REGMAP)
# Debugging Purposes : compares the resulting programmed with the file.
try:
ifpll.check():
printbcolors.FAIL+"Exiting..."+bcolors.ENDC
else:
printbcolors.OKGREEN+"PLL Ready"+bcolors.ENDC
except Exception, e:
importcsv
with open("log.txt","a")aslogFile:
csvW=csv.writer(logFile)
row =[str(e)]
csvW.writerow(row)
time.sleep(30)
ifpll.check():
print"PLL Check True"
pass
else:
pass
bus.close()
user.testSignal=bool(int(testSignal))
user.jtag=bool(int(jtag))
ifbool(user.testSignal)==True:
printbcolors.OKGREEN+"Test Signal ON"+bcolors.ENDC
GPIO.output(PINS["TESTEN"],True)
else:
printbcolors.OKGREEN+"Test Signal OFF"+bcolors.ENDC
GPIO.output(PINS["TESTEN"],False)
ifuser.jtag==True:
printbcolors.OKGREEN+"JTAG A SELECTED"+bcolors.ENDC
GPIO.output(PINS["JTAGSEL"],True)
else:
printbcolors.OKGREEN+"JTAG A&B SELECTED"+bcolors.ENDC
GPIO.output(PINS["JTAGSEL"],False)
user.bunchMarkerA=int(bma)
user.bunchMarkerB=int(bmb)
BMA =bunchMarker(PINS["BMASRCLK"], PINS["BMARCLK"], PINS["SRA"], GPIO)
BMB =bunchMarker(PINS["BMBSRCLK"], PINS["BMBRCLK"], PINS["SRB"], GPIO)
BMA.reset()
BMB.reset()
BMA.bunchMarker(user.bunchMarkerA)
BMB.bunchMarker(user.bunchMarkerB)
# Initialize Fonts
font14h = Font("font14h")
font14h.init_bitmap("font14h.csv")
font14hL = Font("font14hL.csv")
font14hL.init_bitmap("font14hL.csv") / # Initialize Display
# Set Label Strings
inputTitle="XTD:"
bmaTitle="BMA:"
bmbTitle="BMB:"
testCircuit="TEST CIRCUIT:"
pllTitle="PLL:"
jtagTitle="JTAG:"
IPTitle="IP:"
IPValue=getIP()
# Set Label Values
inputValue=""
ifuser.osc==0:
inputValue="RF"
else:
inputValue="OSC"
bmaValue=str(user.bunchMarkerA)
bmbValue=str(user.bunchMarkerB)
testCircuitValue=""
ifuser.testSignal==True:
testCircuitValue="ON"
else:
testCircuitValue="OFF"
pllValue="LOCKED"
jtagValue=""
ifuser.jtag==True:
jtagValue="A"
else:
jtagValue="AB"
try:
display = seps525.SEPS525_nhd(DC = PINS["DISPDC"], RES = PINS["DISPRES"],gpio= GPIO)
display.fill_screen((255,255))
while(True):
# Draw Labels
loffset=10
inputDisp= TS(loffset,10,14,inputTitle, font14h)
bmaDisp= TS(loffset,26,14,bmaTitle, font14h)
bmbDisp= TS(loffset,42,14,bmbTitle, font14h)
testCircuitDisp= TS(loffset,58,14,testCircuit, font14h)
pllDisp= TS(loffset,74,14,pllTitle, font14h)
jtagDisp= TS(loffset,90,14,jtagTitle, font14h)
IPDisp= TS(loffset,106,14,IPTitle, font14h)
inputDisp.draw_string((0,0),(255,255), display)
bmaDisp.draw_string((0,0),(255,255), display)
bmbDisp.draw_string((0,0),(255,255), display)
testCircuitDisp.draw_string((0,0),(255,255), display)
pllDisp.draw_string((0,0),(255,255), display)
jtagDisp.draw_string((0,0),(255,255), display)
IPDisp.draw_string((0,0),(255,255), display)
# Draw Values
loffset=20
inputValueDisp= TS(loffset+len(inputDisp),10,14,inputValue, font14h)
bmaValueDisp= TS(loffset+len(bmaDisp),26,14,bmaValue, font14h)
bmbValueDisp= TS(loffset+len(bmbDisp),42,14,bmbValue, font14h)
testCircuitValueDisp= TS(loffset+len(testCircuitDisp),58,14,testCircuitValue, font14h)
pllValueDisp= TS(loffset+len(pllDisp),74,14,pllValue, font14h)
jtagValueDisp= TS(loffset+len(jtagDisp),90,14,jtagValue, font14h)
IPValueDisp= TS(loffset+len(IPDisp),106,14,IPValue, font14h)
inputValueDisp.draw_string((0,0),(255,255), display)
bmaValueDisp.draw_string((0,0),(255,255), display)
bmbValueDisp.draw_string((0,0),(255,255), display)
testCircuitValueDisp.draw_string((0,0),(255,255), display)
pllValueDisp.draw_string((0,0),(255,255), display)
jtagValueDisp.draw_string((0,0),(255,255), display)
IPValueDisp.draw_string((0,0),(255,255), display)
IPValue=getIP()
ifpll.check():
pllValue="NOT LOCKED!"
else:
pllValue="LOCKED "
ifGPIO.input(PINS["SHUTDOWN"])==False:# depends polarity of shutdown button
break;
except Exception, e:
importcsv
with open("log.txt","a")aslogFile:
csvW=csv.writer(logFile)
row =[str(e)]
csvW.writerow(row)
loffset=10
display.fill_screen((255,255))
shutdownDisp= TS(loffset,26,14,"Shutting Down", font14h)
descDisp1 = TS(loffset,42,14,"Wait for Screen", font14h)
descDisp2 = TS(loffset,74,14,"to Disappear", font14h)
shutdownDisp.draw_string((0,0),(255,255), display)
descDisp1.draw_string((0,0),(255,255), display)
descDisp2.draw_string((0,0),(255,255), display)
#os.system("shutdown -h now")
#For debugging prepose, removed.
os.system("shutdown -r now")
D.2 pin.py
PINS ={
"JTAGSEL":13,
"TESTEN":21,
"INTERRUPT":9,
"TMS":14,
"TDO":15,
"TDI":18,
"BMBSRCLK":22,
"BMARCLK":27,
"BMASRCLK":17,
"TCK":4,
"BMBRCLK":24,
"SRA":23,
"SRB":25,
"SHUTDOWN":7,
"DISPRES":6,
"DISPDC":20,
}
D.3 Reg.py
VCOREGS ={
"ENOUTS":230,
"PLLWPASS":6,
"PFDDIV":29,
"PFDFB":30,
"MSNP1S1":97,
"MSNP1S2":98,
"MSNP1S3":99,
"MSNP2S2":100,
"MSNP2S3":101,
"MSNP2S4":102,
"MSNP3S1":103,
"MSNP3S2":104,
"MSNP3S3":105,
"MSNP3S4":106,
}
D.4 font.py
importos
importcsv
classFont:
# LIBRARIES
"""
Reads a font from a csv bitmap.
"""
def__init__(self, name, spacer =2):
self._name= name
self.FONT={}
self._spacer=""
for i in range(spacer):
self._spacer+="0"
def__str__(self):
characters =""
for char inself.FONT:
characters += char
return characters
definit_bitmap(self,input_file):
"""
Initialize the bitmap from csv file.
The csv row should consist of name, string of 1's and 0's(of width).
Use fontparser.py to get the .csv.
"""
script_path=os.path.dirname(os.path.realpath(__file__))
input_file_path=os.path.join(script_path,input_file)
with open(input_file_path,"rb")asbitmap_file:
reader =csv.reader(bitmap_file)
for row in reader:
if row[0]notinself.FONT.keys():
self.FONT[str(row[0])]=[]
self.FONT[str(row[0])].append(row[1]+self._spacer)
else:
self.FONT[str(row[0])].append(row[1]+self._spacer) / D.5 getIP.py
#!/usr/bin/env python
importos
importcsv
defgetIP():
try:
os.system("ifconfig eth0 > IPADDRESS.txt")
line =[]
with open("IPADDRESS.txt","rb")as IP:
csvReader=csv.reader(IP)
for row incsvReader:
if row !=[]:
if"inetaddr:"in row[0]:
line = row[0]
line =line.split("inetaddr:")
return line[1].split()[0]
except:
return "No IP
D.6 map.txt (1/5) / 2/5 / 3/5 / 4/5 / 5/5
#Do not send this file to Silicon Labs. Use custom part menu option instead.
#This file is not valid for NVM generation.
#Do not modify the contents of this file.
#BEGIN_PROFILE
#Date = Tuesday, May 30, 2017 10:41:40 PM
#Profile = 1
#Software version = 6.4 - October 8, 2014
#File version = 3
#Chip = Si5338
#Input Frequency (MHz) = 509.000000000
#Input Type = LVDS_LVPECL_HCSL
#P1 = 16
#Input Mux = DivFbClk
#FDBK Input Frequency (MHz) = 509.000000000
#FDBK Input Type = LVDS_LVPECL_HCSL
#P2 = 16
#FDBK Mux = NoClk
#PFD Input Frequency (MHz) = 31.812500000
#VCO Frequency (GHz) = 2.545000
#N = 80 (80.0000)
#Internal feedback enabled
#Output Clock 0
# Output Frequency (MHz) = 127.250000000
# Mux Selection = IDn
# MultiSynth = 20 (20.0000)
# R = 1
#Output Clock 1
# Output Frequency (MHz) = 127.250000000
# Mux Selection = IDn
# MultiSynth = 20 (20.0000)
# R = 1
#Output Clock 2
# Output Frequency (MHz) = 127.250000000
# Mux Selection = IDn
# MultiSynth = 20 (20.0000)
# R = 1
#Output Clock 3
# Output is off
#Driver 0
# Enabled
# Powered on
# Output voltage = 3.30
# Output type = 3.3V LVDS
# Output state when disabled = StopLow
#Driver 1
# Enabled
# Powered on
# Output voltage = 3.30
# Output type = 3.3V LVDS
# Output state when disabled = StopLow
#Driver 2
# Enabled
# Powered on
# Output voltage = 3.30
# Output type = 3.3V LVPECL
# Output state when disabled = StopLow
#Driver 3
# Disabled
# Powered off
# Output voltage = 3.30
# Output type = 3.3V LVDS
# Output state when disabled = StopLow
#Frequency and phase adjust 0
# Initial phase offset (ns) = 0.000
# Phase step size (ns) = 0.000
# Frequency adjust is off
#Frequency and phase adjust 1
# Initial phase offset (ns) = 0.000
# Phase step size (ns) = 0.000
# Frequency adjust is off
#Frequency and phase adjust 2
# Initial phase offset (ns) = 0.000
# Phase step size (ns) = 0.000
# Frequency adjust is off
#Frequency and phase adjust 3
# Frequency and phase increment and decrement is off
#Spread spectrum 0
# Spread spectrum is off
#Spread spectrum 1
# Spread spectrum is off
#Spread spectrum 2
# Spread spectrum is off
#Spread spectrum 3
# Spread spectrum is off
#REGISTER_MAP
0,00h / 1,00h
2,00h
3,00h
4,00h
5,00h
6,04h
7,00h
8,70h
9,0Fh
10,00h
11,00h
12,00h
13,00h
14,00h
15,00h
16,00h
17,00h
18,00h
19,00h
20,00h
21,00h
22,00h
23,00h
24,00h
25,00h
26,00h
27,70h
28,03h
29,64h
30,A4h
31,C0h
32,C0h
33,C0h
34,E3h
35,00h
36,06h
37,06h
38,04h
39,00h
40,63h
41,3Ch
42,23h
43,00h
44,00h
45,00h
46,00h
47,14h
48,2Ch
49,00h
50,C4h
51,07h
52,10h
53,00h
54,08h
55,00h
56,00h
57,00h
58,00h
59,01h
60,00h
61,00h
62,00h
63,10h
64,00h
65,08h
66,00h
67,00h
68,00h
69,00h
70,01h
71,00h
72,00h
73,00h
74,10h
75,00h
76,08h
77,00h
78,00h
79,00h
80,00h
81,01h
82,00h
83,00h
84,00h
85,10h
86,00h
87,00h
88,00h / 89,00h
90,00h
91,00h
92,00h
93,00h
94,00h
95,00h
96,10h
97,00h
98,26h
99,00h
100,00h
101,00h
102,00h
103,01h
104,00h
105,00h
106,80h
107,00h
108,00h
109,00h
110,40h
111,00h
112,00h
113,00h
114,40h
115,00h
116,80h
117,00h
118,40h
119,00h
120,00h
121,00h
122,40h
123,00h
124,00h
125,00h
126,00h
127,00h
128,00h
129,00h
130,00h
131,00h
132,00h
133,00h
134,00h
135,00h
136,00h
137,00h
138,00h
139,00h
140,00h
141,00h
142,00h
143,00h
144,00h
145,00h
146,FFh
147,00h
148,00h
149,00h
150,00h
151,00h
152,00h
153,00h
154,00h
155,00h
156,00h
157,00h
158,00h
159,00h
160,00h
161,00h
162,00h
163,00h
164,00h
165,00h
166,00h
167,00h
168,00h
169,00h
170,00h
171,00h
172,00h
173,00h
174,00h
175,00h
176,00h / 177,00h
178,00h
179,00h
180,00h
181,00h
182,00h
183,00h
184,00h
185,00h
186,00h
187,00h
188,00h
189,00h
190,00h
191,00h
192,00h
193,00h
194,00h
195,00h
196,00h
197,00h
198,00h
199,00h
200,00h
201,00h
202,00h
203,00h
204,00h
205,00h
206,00h
207,00h
208,00h
209,00h
210,00h
211,00h
212,00h
213,00h
214,00h
215,00h
216,00h
217,00h
218,00h
219,00h
220,00h
221,0Dh
222,00h
223,00h
224,F4h
225,F0h
226,00h
227,00h
228,00h
229,00h
230,08h
231,00h
232,00h
233,00h
234,00h
235,00h
236,00h
237,00h
238,14h
239,00h
240,00h
242,00h
243,F0h
244,00h
245,00h
247,00h
248,00h
249,A8h
250,00h
251,84h
252,00h
253,00h
254,00h
255,00h
256,00h
257,00h
258,00h
259,00h
260,00h
261,00h
262,00h
263,00h
264,00h
265,00h
266,00h / 267,00h
268,00h
269,00h
270,00h
271,00h
272,00h
273,01h
274,00h
275,00h
276,90h
277,31h
278,00h
279,00h
280,01h
281,00h
282,00h
283,00h
284,00h
285,00h
286,00h
287,00h
288,00h
289,01h
290,00h
291,00h
292,90h
293,31h
294,00h
295,00h
296,01h
297,00h
298,00h
299,00h
300,00h
301,00h
302,00h
303,00h
304,00h
305,01h
306,00h
307,00h
308,90h
309,31h
310,00h
311,00h
312,01h
313,00h
314,00h
315,00h
316,00h
317,00h
318,00h
319,00h
320,00h
321,01h
322,00h
323,00h
324,90h
325,31h
326,00h
327,00h
328,01h
329,00h
330,00h
331,00h
332,00h
333,00h
334,00h
335,00h
336,00h
337,00h
338,00h
339,00h
340,90h
341,31h
342,00h
343,00h
344,01h
345,00h
346,00h
347,00h
348,00h
349,00h
350,00h
#END_PROFILE
1