Project Plan Rev. 0.1 Page ii
Project Bluebird
University of Portland / School of Engineering Phone 503 943 73145000 N. Willamette Blvd. Fax 503 943 7316
Portland, OR 97203-5798
Theory of Operations
Project Killdeer: A Graphic Visual Equalizer
Contributors:
Lance Okuda
Aaron Yee
Ghassan Mazi
Ivan Adzhigirey
Approvals
Name / Date / Name / DateSignature file / Date / Signature file / Date
Dr. Advisor / Dr. Lillevik
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Project Killdeer
Revision History
Rev. / Date / Author / Reason for Changes0.9 / 1/30/03 / Lance Okuda, Aaron Yee / Starting Document
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Project Killdeer
Table of Contents
Summary 1
Introduction 2
Background 3
Graphic Equalizers 3
Fast Fourier Transform (FFT) 3
Architecture 5
General Description 5
Hardware Architecture 5
Microcontroller 5
LCD Module 5
Software Architecture 6
Signal Sampling 6
FFT Calculation 6
Display Generation 6
Design Overview 7
System Block Diagram 7
Hardware Design 7
Microcontroller 7
Clock 8
LCD Module 8
Graphics Controller 8
LCD Display 8
Software Design 8
Signal Sampling 9
FFT Calculation 9
Display Generation 9
Software Task Flow 9
Conclusions 11
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Project Killdeer
List of Figures
Figure 1. Example Of Conversion From Time Domain to Frequency Domain. 3
Figure 2. Highest Frequency That Can Be Analyzed 3
Figure 3. Frequency Resolution 4
Figure 4. Killdeer Overview. 5
Figure 5. Killdeer System Block Diagram. 7
Figure 6. Software Data Flow. 9
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Chapter / Summary1
In the following chapters of this document, we will discuss the architecture and design of project killdeer to help bring an understanding of its intended functions and use. This document is broken up into four chapters. First we will introduce the reader to project Killdeer. Second, we will discuss the project’s background which is to familiarize the reader with what we have in mind for our project’s functionality. Third, we will cover the project’s architecture which will discuss in detail how both the hardware and software will be constructed. Fourth, we will discuss in detail the project’s overall design and how it will integrate both the hardware and software architectures that we have specified.
The purpose of this document is to explain the technical aspects of project Killdeer. Therefore in reading this theory of operations, we hope to give the reader a better understanding of what Killdeer is, how it is built and how it will work.
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Chapter / Introduction2
The purpose of this document is to give an insight to the technical background of project Killdeer. This document will serve as a reference to all technology that is utilized in our design. It is the intention of this document to cover all implementation aspects from software to hardware integration.
This document, however, will not cover any topics related to the scheduled timeline of our project. Also not covered in this document are the functional specifications and general requirements of the components that will be utilized in our design. It is our intention in the theory of operations to present a written record of our design implementation of all system components of our project.
This document is divided into five major sections, to better explain the overall design of the graphic equalizer. The four major sections are: Introduction, Background, Architecture, Design Overview, and Conclusion. Each section contains information that is relevant to our project, and aims to provide information, to give a better understanding of the hardware and software components of our project.
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Chapter / Background3
This chapter provides background to the terminology that will be used in this project. The major terms that we will be covering are graphic equalizers and Fast Fourier Transform.
Graphic Equalizers
A graphic equalizer allows the user to see graphically the different frequency bands in a stereo system. A typical graphic equalizer consists of several audio filter/amplifiers, each centered at a specific frequency in the audio range. Graphic equalizers are common in sound systems for consumer use and are found in practically all professional recording studios.
Fast Fourier Transform (FFT)
Fast Fourier Transform (FFT) produces the frequency domain signal from the time domain signal.
Figure 1. Example Of Conversion From Time Domain to Frequency Domain.
The maximum frequency that can be analyzed is calculated by the equation in Figure 2.
Figure 2. Highest Frequency That Can Be Analyzed
Figure 3. Frequency Resolution
In figure 3, frequency resolution is the frequency divided by the number of samples being used. This gives the range of the frequency response denoted by Δf.
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Project Killdeer
Chapter / Architecture4
This Chapter provides the architectural foundation for our design. It provides a high-level description of our system components.
General Description
Figure 4. Killdeer Overview.
In figure 4, we have shown our system block diagram that shows all major components of our project. The first major component is the center box, which will house the microcontroller and clock. This block will be the core of our project since it will perform all needed operations to create a graphic equalizer. The block to the left is an input signal that will be taken from a radio, CD player, or other sound source via an 3.5mm audio jack. The display module will be our primary form of showing the result of our coding that takes place in the center box. All data that is passed from the center block will flow to the display module, which will identify music frequencies and their strength.
Hardware Architecture
Microcontroller
The microcontroller of our project is contained within the center block of figure 4. It will be the job of this microcontroller to handle all FFT calculations and data output that needs to be sent to the display module.
LCD Module
The LCD module will be the primary form of displaying the results of the FFT calculations that have occurred within the microcontroller. The LCD module will receive data from the microcontroller and then interpret that into data which will produce vertical bars for the different frequencies, and each horizontal row will show the signal strength.
Software Architecture
The software architecture is composed of three major tasks, signal sampling, FFT calculation, and display generation. The first task is an interrupt service routine to sample the signal. This ISR will fill up an input buffer where our FFT will process convert each input to its respective frequency range. The display generation will be used in succession to the FFT to display the change in signal.
Signal Sampling
To sample the signal into the PIC18F452 microcontroller, we will be using a single analog pin RA0 to receive the incoming audio signal. The onboard analog to digital converter or ADC will be used to sample the audio signal. The results of this sampling will be saved to an input buffer located in RAM.
FFT Calculation
To calculate the FFT or Fast Fourier Transform of the signal we will be using a piece of code that has been already prewritten. This code however will be modified to suit the speed and memory requirements of the PIC18F452 microcontroller.
Display Generation
Display generation will take the FFT calculation and alter the display to show that the signal has been detected. This piece of code will interface with the LCD screen and it will be in charge of generating the display text based information as well as the signal waveform image that will represent the incoming audio signal.
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Project Killdeer
Chapter / Design Overview5
The purpose of the design overview is to explain how the architecture is implemented. This section will start from a top level diagram, and explain each individual component that is implemented in our design.
System Block Diagram
Figure 5. Killdeer System Block Diagram.
Figure 5, shows the system block diagram for our graphic equalizer.
Hardware Design
Microcontroller
The PIC microcontroller, PIC18F452, will take its input from an audio input jack, which is commonly used for CD players and radios. Our microcontroller will be controlled by an on-off switch. When the switch is in the on position, the microcontroller will accept inputs and be in a powered up and on-state. When the switch is in the off position, the device will not perform any operations. Once our signal has been captured, we then need to get the signal into a form that can be processed. To do this, we will be using an embedded Fast Fourier Transform function within the microcontroller. By separating the different frequencies of sound (where are the specific frequencies?) we will be able to process the signal as digital inputs to the visualization program that we will be running within our microcontroller.
Once our signal has been separated and digitally processed, we will then write our software to trigger off of certain thresholds in each divided frequency range. This software will be used to send data to the LCD module which will be in charge of displaying the required frequencies and their respective strengths. Basically weWe will display the frequencies and strengths of signals by using vertical bars that will represent the various sound frequencies. Each horizontal row will then represent the strength of the signal in dB of the appropriate frequency.
Clock
The clock that will be used in our system runs at a frequency of 40 MHz. This will be responsible for generating a clock signal for the microcontroller, in order for us to calculate interrupts and to obtain the correct timing of data.
LCD Module
In this project the major component that will be used is a LCD (Liquid Crystal Display) display module. The LCD module, DMF-5005NY-LY-AKE-CN, is manufactured by Optrex. This module has two major components that are embedded onto the LCD screen, a graphics controller and a LCD display. The LCD that we have chosen has an onboard dot matrix video controller which will control the outputting to the LCD display module. This LCD will have a viewing area of 132(W) x 39(h) mm, and will be backlit in a yellow-green color. The resolution of this LCD is 240(W) x 64(H) dots, which will allow us to divide the screen up for the different audio frequencies and the strength of the signal.
Graphics Controller
On the LCD module is a T6963C graphics controller that is manufactured by Toshiba. This controller is used to control an external LCD display and will be used to output data onto the LCD screen, once data is received from the microcontroller.
LCD Display
Our LCD Display is a graphics type module that allows for a maximum of 240*64 pixels. This component will display all information that is received by the graphics controller and will have a viewing area of 132(W) mm x 39mm(H).
Software Design
The software design we will be implementing the three major tasks, signal sampling, FFT calculation, and display generation. To accomplish these tasks we will be using an interrupt service routine to sample the signal at a given frequency of 40 khz. We have determined that at 40 kHz we will be getting a pretty reasonable representation of the incoming audio signal. Once the signal has been sampled, the ISR will fill up an input buffer where our FFT will process convert each input to its respective frequency range. The display generation routine will be used in succession to the FFT to generate the display as well as the waveform image that will represent the audio signal. Both the FFT and display generation will run in between the signal sampling interrupts.
Signal Sampling
To sample the signal into the PIC18F452 microcontroller, we will be using a single analog pin RA0 to receive the incoming audio signal. To acquire a sample we will configure the onboard analog to digital converter or ADC to sample the signal at 40 kHz. The results of this sampling will be saved to an input buffer located in RAM. Sampling will be triggered off of an interrupt going at 40 kHz to allow for the rest of the CPU to process the signal and display it.
FFT Calculation
To calculate the FFT or Fast Fourier Transform of the signal we will be using a piece of code that has been already prewritten. This code however will be modified to suit the speed and memory requirements of the PIC18F452 microcontroller. The results of each FFT calculations will be then passed on to the display generation task.
Display Generation
Display generation will take the FFT calculation and alter the display to show that the signal has been detected. This piece of code will interface with the LCD screen and it will be in charge of generating the display text based information and or graphics as well as the signal waveform that will represent the incoming audio signal.
Software Task Flow
Figure 6. Software Data Flow.
Figure 6 illustrates the major software steps that are involved in our code. Step one is to take an audio signal and using interrupt service routines capture the sound using an analog to digital converter and place the data into a buffer. A check is performed to see if the buffer is full or not, if the buffer is full then the FFT code begins on the data collected in the buffer. If not the program waits till the buffer becomes full. Once FFT is done computing its data it sends the data out to a display module which outputs all the data into graphical vertical bars that represent the different frequencies.