The MARIE instruction set

Machine instructions are executed by executing a sequence of register transfer instructions – sometimes called micro-instructions.

Fetch

EVERY instruction must be fetched before it can be executed:

Fetch the instruction

  • MAR  PC
  • MBR  M[MAR], PC PC + 1
  • IR  MBR

Load X (op code = 0001, or 1)

  • MARIR[Addr]
  • MBRM[MAR]
  • ACMBR

NOTE: In the following instruction, the reason that the first two microinstructions can be executed in parallel is that they use different busses!

Store X (op code = 0010, or 2)

  • MARIR[Addr], MBRAC
  • M[MAR]MBR

Add X (op code = 0011, or 3)

  • MARIR[Addr]
  • MBRM[MAR]
  • ACAC+MBR

Subt X (op code = 0100, or 4)

  • MARIR[Addr]
  • MBRM[MAR]
  • ACAC-MBR

Input (op code = 0101, or 5)

  • ACInREG

Output (op code = 0110, or 6)

  • OutREGAC

Halt (op code = 0111, or 7)

  • No register transfer operations are performed. The program stops.

Skipcond (op code = 1000, or 8)

Note that this is actually 3 different instructions. The four bits of the op code are the same, but the instruction is effectively extended by two more bits. If you were writing instructions in assembly language, this instruction would most likely have 3 different forms:

SkipcondPositive (op code = 1000 and 10)

  • 1000 1000 0000 0000
  • If op code = 1000 and 10, then
    IfAC0thenPCPC+1

SkipcondNegative (op code = 1000 and 00)

  • 1000 0000 0000 0000
  • If op code = 1000 and 00, then
    IfAC0thenPCPC+1

SkipcondZero (op code = 1000 and 01)

  • 1000 0100 0000 0000
  • If op code = 1000 and 01, then
    IfAC=0thenPCPC+1

Jump X (op code = 1001, or 9)

  • PCIR[Addr]

JnS X (Jump and Store, op code = 0)

  • Stores the PC at location X and jumps to location X + 1.

This instruction makes it possible to write subroutines and return from them! This implies that the first memory cell of any subprogram in MARIE will not hold an instruction at all, but a return address.

Register Transfer Notation for JnS X

  • MBR  PC/Get the PC (return address!)
  • MAR  IR[addr]/Write it to ...
  • M[MAR]  MBR/... the subroutine's location
  • MBR  IR[addr]/Put subroutine's address in MBR
  • AC  1/Put 1 in the AC
  • AC AC + MBR/Add 1 to the subroutine's address
  • PC  AC/Put sub+1 into the PC

Clear (Clears the AC, op code = A)

RegisterTransferNotation for Clear

  • AC  0

AddI X (Add Indirect, op code = B)

GotoaddressX. Location X does NOT hold the data to be added. Rather, it holds the ADDRESS of the data to be added to AC. Go to THAT address, get the data, and add it to the AC.

Register Transfer Instructions for AddI

  • MAR  IR[addr]/Put address into MAR
  • MBR  M[MAR]/Read data in that address
  • MAR  MBR/Put THAT address into MAR
  • MBR  M[MAR]/Read data at THAT address
  • AC AC + MBR/Add THAT data to AC

JumpI X (Jump Indirect, op code = C)

Go to address X. Location X is NOT the location to jump to. Rather, it holds the ADDRESS of the location to jump to.

Register Transfer Instructions for JumpI

  • MAR  IR[addr]/Put address into MAR
  • MBR  M[MAR]/Get data at that address
  • PC  MBR/Jump to THAT address

LoadI X. Load Indirect. Op code: D

Do not load the data in X. Instead, get the address that is in X. Load the data from this location.

First instruction is INCORRECT in book!

Register transfer instructions:

MAR IR[Address]/Copy X's address to MAR

MBR M[MAR]/Read from X (this is the actual address)

MAR  MBR/Copy it to MAR to prepare to read from memory

MBR M[MAR]/Read from memory

AC  MBR/Copy the data to the AC

StoreI X. Store indirect. Op code: E.

Do not store the data at location X. Instead, get the address that is in X. Store the data at this location.

First instruction is INCORRECT in book!

Register transfer instructions:

MAR IR[Address]/Get the contents of X (the address)

MBR M[MAR]/MBR now has the address

MAR  MBR/Copy it to MAR to prepare to write to memory

MBR  AC/Get the data to be written

M[MAR]  MBR/Write it