Sectionhead: Max S Chips & Dips

1007CD_MaxC&D.doc

@sectionhead: Max’s Chips & Dips

@head: MATLAB-to-C Flow Supports State-of-the-Art EDA-Tool Development

@deck: Catalytic’s MATLAB-to-C Synthesis dramatically increases productivity, quality, and focus for the Manufacturing Modeling Group at Cadence.

@text: When it comes to delivering the electronic-design-automation (EDA) tools that are used to create cutting-edge integrated-circuit (silicon-chip) designs, Cadence Design Systems ( is well known as an industry leader. In order to maintain this leadership position, Cadence’s Manufacturing Modeling Integration (MMI) organization is tasked with making the design tools understand and accommodate a wide variety of manufacturing issues. One such issue that is absolutely critical in the case of today’s incredibly sophisticated manufacturing processes is that of chemical mechanical polishing (CMP). A typical silicon chip may be around 10 × 10 mm square. Hundreds of these chips will be fabricated on a thin, round sheet of silicon called a wafer, which is 300 mm in diameter and only a fraction of a millimeter thick.

Each chip may contain hundreds of millions of transistors, which are formed on the surface of the silicon wafer. In addition to the transistors, multiple layers of copper tracks (wires) are created on the surface of the wafer. There, each of these conducting layers is separated by an extremely thin layer of insulating material. Each chip may have hundreds of thousands of copper wires on each of its layers. The width and thickness of each wire are measured in microns (thousands of millionths of a meter). CMP is used to smooth the surface of the wafer after each layer of metal tracks has been created (see Figure 1).

Because the tracks are so small, small variations in their thickness can dramatically impact the following: the speed of signals passing through them, the amount of power they consume, and their susceptibility to noise effects. They may even cause pooling or shorts, thereby creating complete function failures.

Complexities Involved In Modeling The CMP Process

To create a layer of tracks on the surface of the wafer, an insulating layer is first deposited and etched. A thin barrier layer is then applied. Finally, a layer of copper is deposited across the face of the wafer. After a new layer of copper has been deposited, the surface of the chip is uneven. As a result, it needs to be polished using CMP. This process is intended to make the chip flat and smooth before the next layer is added.

Polishing the wafer uniformly is tricky. The various materials deposited on the wafer have different chemical and mechanical characteristics. In addition, they are affected at different rates. This problem is further complicated by the mechanical properties of the wafer and the polishing pad, such as their elasticity. The result is that polishing a minute “bump” at one location on the chip may cause a corresponding “dip” millimeters (hundreds of wires) away.

The solution is for the designer to add additional copper to different areas of the chip to ensure a more uniform distribution of “bumps.” In turn, this means that it is necessary to accurately model the CMP process to determine where to add the extra copper. The designer must then check that these areas of “copper fill” perform as required.

Modeling the CMP process is extremely complex. It therefore requires highly sophisticated algorithms. First, the model needs to be calibrated for the particular chip foundry process being used. Next, the chip-layout and CMP models are used to create a 3D topographic view of the chip that is utilized for both analysis and automatic “fill” placement. MATLAB is used throughout this process--from the code for the calibration step to creating the 3D model of the chip and automatically placing fills. The end result is a more power-efficient chip--with fewer defects--that works at higher clock frequencies.

Cadence Acquires Praesagus

Sometime around the year 2000, a group of PhD students at MIT began to address the subtleties involved in truly modeling the effects of CMP. Over time, the group expanded and formed a company called Praesagus. There, they continued to both evolve and refine their models and to calibrate them against real-world foundry processes.

“The result was approximately 20,000 lines of highly optimized and vectorized MATLAB code,” says Emmanuel Drege, Senior Member of Consulting Staff. “The fact that we started working on the CMP modeling problem when we did--before CMP-related variability effects became a significant problem--gave us a commanding technology advantage including the fact that our parameterized models are applicable to processes from multiple foundries. This technology lead and the sophistication of our models were key reasons why we were acquired by Cadence Design Systems in March 2006.”

The Problem

“We quickly found a home within the MMI organization, where we formed the Manufacturing Modeling Group (MMG),” comments Shishir Shroff, Member of Consulting Staff. “Our problem was to translate our 20,000 lines of MATLAB’s M-Code into a form that could be used by the groups developing the EDA tools. Also, it’s important to note that this is not about integrating a small piece of MATLAB into a large piece of pre-existing software; this is about building the entire application. Our MATLAB models actually account for approximately 80% of the functionality of these tools, so they represent a major part of the end product.”

“Actually, the real problem was that we wished to continue to use M-Code as our golden representation so as to be able to take full advantage of MATLAB’s superb visualization and analysis capabilities,” notes Emmanuel. “Our initial approach was to perform the translation by hand, but this took many months. And even after we’d completed the initial translation, every time we modified our algorithms in the MATLAB domain, we had to spend at least a week propagating these changes into the translated code.”

“Things really started to get tricky when the product-development teams ran into some issue,” adds Shishir, “because no one knew where the error lay. Was it in the hand-translation or in the integration? The result was that the members of our team were spending the bulk of their time wading through the hand-translated code trying to determine the source of the glitch, as opposed to performing research and further enhancing our models.”

The Solution

“With only two months in our rapid product-release cycles, we were almost always scrambling to get this hand-translation done in time and with the required level of accuracy,” says Nickhil Jakatdar, Engineering Group Director. “Strange as it seems, we initially started to evaluate the Catalytic MCS tool with regard to speeding our MATLAB simulations. So we were extremely fortunate that Catalytic were releasing their MCS (MATLAB-to-C Synthesis) tool at that time, because its capabilities were exactly what we needed to communicate our algorithms to the product-development groups in a form they could use.”

“This was the answer to one of our most fundamental problems,” comments Emmanuel. “Even though we were so close to a product release, Cadence management had the foresight to trust our recommendations. In addition to the fact that Catalytic MCS supports a broad subset of the MATLAB language, we were able to tap into the large set of functions supported by the Catalytic Function Library to implement some of the higher-level functions used in the most complex parts of our algorithms. After spending a couple of weeks modifying our 20,000 lines of MATLAB code into a form suitable for use with Catalytic’s MATLAB-to-C Synthesis (where these changes almost invariably fell under the category of ‘good programming practices’), everything flowed smoothly. In the past, whenever we modified our MATLAB models, it took at least a week to propagate each change to the product teams. Now, after making and verifying even a major change to our algorithms in MATLAB, it’s a push-button operation to generate the C code to be handed over to the product-development groups. The really cool thing is that the product-development folks are able to take the generated C code ‘as-is’ and integrate it into their products without any modifications.”

“It’s certainly been a great addition to our research and development environment, allowing us to deliver high-quality models and code very rapidly,” adds Shishir. “Now we don’t have to worry about the quality of the translation, because the seamless integration of Catalytic MCS within MATLAB allows us to verify that the generated C code produces exactly the same results as the original MATLAB algorithms. (We do this via the automatic generation of MEX-files directly from the MATLAB command line.) This means that we can spend our time doing what we do best--research.”

Author:

Clive (Max) Maxfield is author of Bebop to the Boolean Boogie (An Unconventional Guide to Electronics) and The Design Warrior’s Guide to FPGAs (Devices, Tools, and Flows). Max also is the co-author of How Computers Do Math, featuring the pedagogical and phantasmagorical virtual DIY Calculator (

In addition to being a hero, trendsetter, and leader of fashion, Max is widely regarded as being an expert in all aspects of computing and electronics (at least by his mother). Max was once referred to as “an industry notable” and a “semiconductor design expert” by someone famous who wasn’t prompted, coerced, or remunerated in any way.

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Captions:

Figure 1: Shown is a highly magnified view of copper tracks. (Insulating layers have been removed.)

Figure 2: Here is a topographic view of part of the surface of a chip.